Electronic Nose Based On Metal Oxide Semiconductor Sensors as an Alternative Technique for the Spoilage Classification of Oat Milk

The aim of the present study was to develop a rapid method for electronic nose for online quality control of oat milk. Analysis by electronic nose and bacteriological measurements were performed to analyze spoilage kinetics of oat milk samples stored at room temperature and refrigerated conditions for up to 15 days. Principal component analysis (PCA), Discriminant Factorial Analysis (DFA) and Soft Independent Modelling by Class Analogy (SIMCA) classification techniques were used to differentiate the samples of oat milk at different days. The total plate count (bacteriological method) was selected as the reference method to consistently train the electronic nose system. The e-nose was able to differentiate between the oat milk samples of varying microbial load. The results obtained by the bacteria total viable countsshowed that the shelf-life of oat milk stored at room temperature and refrigerated conditions were 20hrs and 13 days, respectively. The models built classified oat milk samples based on the total microbial population into “unspoiled” and “spoiled”.

A Spatial Point Pattern Analysis to Recognize Fail Bit Patterns in Semiconductor Manufacturing

The yield management system is very important to produce high-quality semiconductor chips in the semiconductor manufacturing process. In order to improve quality of semiconductors, various tests are conducted in the post fabrication (FAB) process. During the test process, large amount of data are collected and the data includes a lot of information about defect. In general, the defect on the wafer is the main causes of yield loss. Therefore, analyzing the defect data is necessary to improve performance of yield prediction. The wafer bin map (WBM) is one of the data collected in the test process and includes defect information such as the fail bit patterns. The fail bit has characteristics of spatial point patterns. Therefore, this paper proposes the feature extraction method using the spatial point pattern analysis. Actual data obtained from the semiconductor process is used for experiments and the experimental result shows that the proposed method is more accurately recognize the fail bit patterns.

Pattern Recognition Using Feature Based Die-Map Clusteringin the Semiconductor Manufacturing Process

Depending on the big data analysis becomes important, yield prediction using data from the semiconductor process is essential. In general, yield prediction and analysis of the causes of the failure are closely related. The purpose of this study is to analyze pattern affects the final test results using a die map based clustering. Many researches have been conducted using die data from the semiconductor test process. However, analysis has limitation as the test data is less directly related to the final test results. Therefore, this study proposes a framework for analysis through clustering using more detailed data than existing die data. This study consists of three phases. In the first phase, die map is created through fail bit data in each sub-area of die. In the second phase, clustering using map data is performed. And the third stage is to find patterns that affect final test result. Finally, the proposed three steps are applied to actual industrial data and experimental results showed the potential field application.

The Experience with SiC MOSFET and Buck Converter Snubber Design

The newest semiconductor devices on the market are MOSFET transistors based on the silicon carbide – SiC. This material has exclusive features thanks to which it becomes a better switch than Si – silicon semiconductor switch. There are some special features that need to be understood to enable the device’s use to its full potential. The advantages and differences of SiC MOSFETs in comparison with Si IGBT transistors have been described in first part of this article. Second part describes driver for SiC MOSFET transistor and last part of article represents SiC MOSFET in the application of buck converter (step-down) and design of simple RC snubber. 

Study of a Fabry-Perot Resonator

A laser is essentially an optical oscillator consisting of a resonant cavity, an amplifying medium and a pumping source. In semiconductor diode lasers, the cavity is created by the boundary between the cleaved face of the semiconductor crystal and air, and has reflective properties as a result of the differing refractive indices of the two media. For a GaAs-air interface a reflectance of 0.3 is typical and therefore the length of the semiconductor junction forms the resonant cavity. To prevent light being emitted in unwanted directions from the junction, sides perpendicular to the required direction are roughened. The objective of this work is to simulate the optical resonator Fabry-Perot and explore its main characteristics, such as FSR, finesse, linewidth, transmission and so on, that describe the performance of resonator.

An Exploration on Competency-Based Curricula in Integrated Circuit Design

In this paper the relationships between professional competences and school curriculain IC design industry are explored. The semi-structured questionnaire survey and focus group interview is the research method. Study participants are graduates of microelectronics engineering professional departments who are currently employed in the IC industry. The IC industries are defined as the electronic component manufacturing industry and optical-electronic component manufacturing industry in the semiconductor industry and optical-electronic material devices, respectively. Study participants selected from IC design industry include IC engineering and electronic & semiconductor engineering. The human training with IC design professional competence in microelectronics engineering professional departments is explored in this research. IC professional competences of human resources in the IC design industry include general intelligence and professional intelligence.

Metal-Semiconductor-Metal Photodetector Based On Porous In0.08Ga0.92N

Characteristics of MSM photodetector based on a porous In0.08Ga0.92N thin film were reported. Nanoporous structures of n-type In0.08Ga0.92N/AlN/Si thin films were synthesized by photoelectrochemical (PEC) etching at a ratio of 1:4 of HF:C2H5OH solution for 15min. The structural and optical properties of pre- and post-etched thin films were investigated. Field emission scanning electron microscope and atomic force microscope images showed that the pre-etched thin film has a sufficiently smooth surface over a large region and the roughness increased for porous film. Blue shift has been observed in photoluminescence emission peak at 300 K for porous sample. The photoluminescence intensity of the porous film indicated that the optical properties have been enhanced. A high work function metals (Pt and Ni) were deposited as a metal contact on the porous films. The rise and recovery times of the devices were investigated at 390nm chopped light. Finally, the sensitivity and quantum efficiency were also studied.

Effect of Field Dielectric Material on Performance of InGaAs Power LDMOSFET

In this paper, a power laterally-diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) on In0.53Ga0.47As is presented. The device utilizes a thicker field-oxide with low dielectric constant under the field-plate in order to achieve possible reduction in device capacitances and reduced-surface-field effect. Using 2D numerical simulations, performance of the proposed device is analyzed and compared with that of the conventional LDMOSFET. The proposed structure provides 50% increase in the breakdown voltage, 21% increase in transit frequency, and 72% improvement in figure-of-merit over the conventional device for same cell pitch.

Trap Assisted Tunneling Model for Gate Current in Nano Scale MOSFET with High-K Gate Dielectrics

This paper presents a new compact analytical model of the gate leakage current in high-k based nano scale MOSFET by assuming a two-step inelastic trap-assisted tunneling (ITAT) process as the conduction mechanism. This model is based on an inelastic trap-assisted tunneling (ITAT) mechanism combined with a semiempirical gate leakage current formulation in the BSIM 4 model. The gate tunneling currents have been calculated as a function of gate voltage for different gate dielectrics structures such as HfO2, Al2O3 and Si3N4 with EOT (equivalent oxide thickness) of 1.0 nm. The proposed model is compared and contrasted with santaurus simulation results to verify the accuracy of the model and excellent agreement is found between the analytical and simulated data. It is observed that proposed analytical model is suitable for different highk gate dielectrics simply by adjusting two fitting parameters. It was also shown that gate leakages reduced with the introduction of high-k gate dielectric in place of SiO2.

Measurement of I-V Characteristics of a PtSi/p-Si Schottky Barrier Diode at low Temperatures

The current-voltage characteristics of a PtSi/p-Si Schottky barrier diode was measured at the temperature of 85 K and from the forward bias region of the I-V curve, the electrical parameters of the diode were measured by three methods. The results obtained from the two methods which considered the series resistance were in close agreement with each other and from them barrier height (), ideality factor (n) and series resistance () were found to be 0.2045 eV, 2.877 and 14.556 K respectively. By measuring the I-V characteristics in the temperature range of 85-136 K the electrical parameters were observed to have strong dependency on temperature. The increase of barrier height and decrease of ideality factor with increasing temperature is attributed to the existence of barrier height inhomogeneities in the silicide-semiconductor structure.

Temperature Effect on the Organic Solar Cells Parameters

In this work, the influence of temperature on the different parameters of solar cells based on organic semiconductors are studied. The short circuit current Isc increases so monotonous with temperature and then saturates to a maximum value before decreasing at high temperatures. The open circuit voltage Vco decreases linearly with temperature. The fill factor FF and efficiency, which are directly related with Isc and Vco follow the variations of the letters. The phenomena are explained by the behaviour of the mobility which is a temperature activated process.

Evaluation of the Energy Consumption per Bit inBENES Optical Packet Switch

We evaluate the average energy consumption per bit in Optical Packet Switches equipped with BENES switching fabric realized in Semiconductor Optical Amplifier (SOA) technology. We also study the impact that the Amplifier Spontaneous Emission (ASE) noise generated by a transmission system has on the power consumption of the BENES switches due to the gain saturation of the SOAs used to realize the switching fabric. As a matter of example for 32×32 switches supporting 64 wavelengths and offered traffic equal to 0,8, the average energy consumption per bit is 2, 34 · 10-1 nJ/bit and increases if ASE noise introduced by the transmission systems is increased.

Phase Error Accumulation Methodology for On-Chip Cell Characterization

This paper describes the design of new method of propagation delay measurement in micro and nanostructures during characterization of ASIC standard library cell. Providing more accuracy timing information about library cell to the design team we can improve a quality of timing analysis inside of ASIC design flow process. Also, this information could be very useful for semiconductor foundry team to make correction in technology process. By comparison of the propagation delay in the CMOS element and result of analog SPICE simulation. It was implemented as digital IP core for semiconductor manufacturing process. Specialized method helps to observe the propagation time delay in one element of the standard-cell library with up-to picoseconds accuracy and less. Thus, the special useful solutions for VLSI schematic to parameters extraction, basic cell layout verification, design simulation and verification are announced.

Numerical Calculation of the Ionization Energy of Donors in a Cubic Quantum well and Wire

The ionization energy in semiconductor systems in nano scale was investigated by using effective mass approximation. By introducing the Hamiltonian of the system, the variational technique was employed to calculate the ground state and the ionization energy of a donor at the center and in the case that the impurities are randomly distributed inside a cubic quantum well. The numerical results for GaAs/GaAlAs show that the ionization energy strongly depends on the well width for both cases and it decreases as the well width increases. The ionization energy of a quantum wire was also calculated and compared with the results for the well.

Temperature Variation Effects on I-V Characteristics of Cu-Phthalocyanine based OFET

In this study we present the effect of elevated temperatures from 300K to 400K on the electrical properties of copper Phthalocyanine (CuPc) based organic field effect transistors (OFET). Thin films of organic semiconductor CuPc (40nm) and semitransparent Al (20nm) were deposited in sequence, by vacuum evaporation on a glass substrate with previously deposited Ag source and drain electrodes with a gap of 40 μm. Under resistive mode of operation, where gate was suspended it was observed that drain current of this organic field effect transistor (OFET) show an increase with temperature. While in grounded gate condition metal (aluminum) – semiconductor (Copper Phthalocyanine) Schottky junction dominated the output characteristics and device showed switching effect from low to high conduction states like Zener diode at higher bias voltages. This threshold voltage for switching effect has been found to be inversely proportional to temperature and shows an abrupt decrease after knee temperature of 360K. Change in dynamic resistance (Rd = dV/dI) with respect to temperature was observed to be -1%/K.

FWM Wavelength Conversion Analysis in a 3-Integrated Portion SOA and DFB Laser using Coupled Wave Approach and FD-BPM Method

In this paper we have numerically analyzed terahertzrange wavelength conversion using nondegenerate four wave mixing (NDFWM) in a SOA integrated DFB laser (experiments reported both in MIT electronics and Fujitsu research laboratories). For analyzing semiconductor optical amplifier (SOA), we use finitedifference beam propagation method (FDBPM) based on modified nonlinear SchrÖdinger equation and for distributed feedback (DFB) laser we use coupled wave approach. We investigated wavelength conversion up to 4THz probe-pump detuning with conversion efficiency -5dB in 1THz probe-pump detuning for a SOA integrated quantum-well

Design and Layout of a X-Band MMIC Power Amplifier in a Phemt Technology

The design of Class A and Class AB 2-stage X band Power Amplifier is described in this report. This power amplifier is part of a transceiver used in radar for monitoring iron characteristics in a blast furnace. The circuit was designed using foundry WIN Semiconductors. The specification requires 15dB gain in the linear region, VSWR nearly 1 at input as well as at the output, an output power of 10 dBm and good stable performance in the band 10.9-12.2 GHz. The design was implemented by using inter-stage configuration, the Class A amplifier was chosen for driver stage i.e. the first amplifier focusing on the gain and the output amplifier conducted at Class AB with more emphasis on output power.

Characterization of Responsivity, Sensitivity and Spectral Response in Thin Film SOI photo-BJMOS -FET Compatible with CMOS Technology

Photo-BJMOSFET (Bipolar Junction Metal-Oxide- Semiconductor Field Effect Transistor) fabricated on SOI film was proposed. ITO film is adopted in the device as gate electrode to reduce light absorption. Depletion region but not inversion region is formed in film by applying gate voltage (but low reverse voltage) to achieve high photo-to-dark-current ratio. Comparisons of photoelectriccharacteristics executed among VGK=0V, 0.3V, 0.6V, 0.9V and 1.0V (reverse voltage VAK is equal to 1.0V for total area of 10×10μm2). The results indicate that the greatest improvement in photo-to-dark-current ratio is achieved up to 2.38 at VGK=0.6V. In addition, photo-BJMOSFET is compatible with CMOS integration due to big input resistance

Compact Tunable 10 W picosecond Sourcebased on Yb-doped Fiber Amplification of Gain Switch Laser Diode

A compact tunable 10 W picosecond source based on Yb-doped fiber amplification of gain switch laser diode has been demonstrated. A gain switch semiconductor laser diode was used as the seed source, and a multi-stage single mode Yb-doped fiber preamplifier was combined with two large mode area double-clad Yb-doped fiber main amplifiers to construct the amplification system. The tunable pulses with high stability and excellent beam quality (M2

Semi Classical Three-Valley Monte Carlo Simulation Analysis of Steady-State and Transient Electron Transport within Bulk Ga0.38In0.62P

to simulate the phenomenon of electronic transport in semiconductors, we try to adapt a numerical method, often and most frequently it’s that of Monte Carlo. In our work, we applied this method in the case of a ternary alloy semiconductor GaInP in its cubic form; The Calculations are made using a non-parabolic effective-mass energy band model. We consider a band of conduction to three valleys (ΓLX), major of the scattering mechanisms are taken into account in this modeling, as the interactions with the acoustic phonons (elastic collisions) and optics (inelastic collisions). The polar optical phonons cause anisotropic collisions, intra-valleys, very probable in the III-V semiconductors. Other optical phonons, no polar, allow transitions inter-valleys. Initially, we present the full results obtained by the simulation of Monte Carlo in GaInP in stationary regime. We consider thereafter the effects related to the application of an electric field varying according to time, we thus study the transient phenomenon which make their appearance in ternary material