Temperature-Dependent Barrier Characteristics of Inhomogeneous Pd/n-GaN Schottky Barrier Diodes Surface

The current-voltage (I-V) characteristics of Pd/n-GaN Schottky barrier were studied at temperatures over room temperature (300-470K). The values of ideality factor (n), zero-bias barrier height (φB0), flat barrier height (φBF) and series resistance (Rs) obtained from I-V-T measurements were found to be strongly temperature dependent while (φBo) increase, (n), (φBF) and (Rs) decrease with increasing temperature. The apparent Richardson constant was found to be 2.1x10-9 Acm-2K-2 and mean barrier height of 0.19 eV. After barrier height inhomogeneities correction, by assuming a Gaussian distribution (GD) of the barrier heights, the Richardson constant and the mean barrier height were obtained as 23 Acm-2K-2 and 1.78eV, respectively. The corrected Richardson constant was very closer to theoretical value of 26 Acm-2K-2. 

Electrochemical Performance of Carbon Nanotube Based Supercapacitor

Carbon nanotube is one of the most attractive materials for the potential applications of nanotechnology due to its excellent mechanical, thermal, electrical and optical properties. In this paper we report a supercapacitor made of nickel foil electrodes, coated with multiwall carbon nanotubes (MWCNTs) thin film using electrophoretic deposition (EPD) method. Chemical vapor deposition method was used for the growth of MWCNTs and ethanol was used as a hydrocarbon source. High graphitic multiwall carbon nanotube was found at 750oC analyzing by Raman spectroscopy. We observed the electrochemical performance of supercapacitor by cyclic voltammetry. The electrodes of supercapacitor fabricated from MWCNTs exhibit considerably small equivalent series resistance (ESR), and a high specific power density. Electrophoretic deposition is an easy method in fabricating MWCNT electrodes for high performance supercapacitor.

Measurement of I-V Characteristics of a PtSi/p-Si Schottky Barrier Diode at low Temperatures

The current-voltage characteristics of a PtSi/p-Si Schottky barrier diode was measured at the temperature of 85 K and from the forward bias region of the I-V curve, the electrical parameters of the diode were measured by three methods. The results obtained from the two methods which considered the series resistance were in close agreement with each other and from them barrier height (), ideality factor (n) and series resistance () were found to be 0.2045 eV, 2.877 and 14.556 K respectively. By measuring the I-V characteristics in the temperature range of 85-136 K the electrical parameters were observed to have strong dependency on temperature. The increase of barrier height and decrease of ideality factor with increasing temperature is attributed to the existence of barrier height inhomogeneities in the silicide-semiconductor structure.

Investigation of the Electronic Properties of Au/methyl-red/Ag Surface type Schottky Diode by Current-Voltage Method

In this paper, fabrication and study of electronic properties of Au/methyl-red/Ag surface type Schottky diode by current-voltage (I-V) method has been reported. The I-V characteristics of the Schottky diode showed the good rectifying behavior. The values of ideality factor n and barrier height b of Au/methyl-red/Ag Schottky diode were calculated from the semi-log I-V characteristics and by using the Cheung functions. From semi-log current-voltage characteristics the values of n and b were found 1.93 and 0.254 eV, respectively, while by using Cheung functions their values were calculated 1.89 and 0.26 eV, respectively. The effect of series resistance was also analyzed by Cheung functions. The series resistance RS values were determined from dV/d(lnI)–I and H(I)–I graphs and were found to be 1.1 k and 1.3 k, respectively.

A Novel 14 nm Extended Body FinFET for Reduced Corner Effect, Self-Heating Effect, and Increased Drain Current

In this paper, we have proposed a novel FinFET with extended body under the poly gate, which is called EB-FinFET, and its characteristic is demonstrated by using three-dimensional (3-D) numerical simulation. We have analyzed and compared it with conventional FinFET. The extended body height dependence on the drain induced barrier lowering (DIBL) and subthreshold swing (S.S) have been also investigated. According to the 3-D numerical simulation, the proposed structure has a firm structure, an acceptable short channel effect (SCE), a reduced series resistance, an increased on state drain current (I on) and a large normalized I DS. Furthermore, the structure can also improve corner effect and reduce self-heating effect due to the extended body. Our results show that the EBFinFET is excellent for nanoscale device.

Solar Cell Parameters Estimation Using Simulated Annealing Algorithm

This paper presents Simulated Annealing based approach to estimate solar cell model parameters. Single diode solar cell model is used in this study to validate the proposed approach outcomes. The developed technique is used to estimate different model parameters such as generated photocurrent, saturation current, series resistance, shunt resistance, and ideality factor that govern the current-voltage relationship of a solar cell. A practical case study is used to test and verify the consistency of accurately estimating various parameters of single diode solar cell model. Comparative study among different parameter estimation techniques is presented to show the effectiveness of the developed approach.

Noise Performance of Millimeter-wave Silicon Based Mixed Tunneling Avalanche Transit Time(MITATT) Diode

A generalized method for small-signal simulation of avalanche noise in Mixed Tunneling Avalanche Transit Time (MITATT) device is presented in this paper where the effect of series resistance is taken into account. The method is applied to a millimeter-wave Double Drift Region (DDR) MITATT device based on Silicon to obtain noise spectral density and noise measure as a function of frequency for different values of series resistance. It is found that noise measure of the device at the operating frequency (122 GHz) with input power density of 1010 Watt/m2 is about 35 dB for hypothetical parasitic series resistance of zero ohm (estimated junction temperature = 500 K). Results show that the noise measure increases as the value of parasitic resistance increases.

A Comparative Study of Electrical Transport Phenomena in Ultrathin vs. Nanoscale SOI MOSFETs Devices

Ultrathin (UTD) and Nanoscale (NSD) SOI-MOSFET devices, sharing a similar W/L but with a channel thickness of 46nm and 1.6nm respectively, were fabricated using a selective “gate recessed” process on the same silicon wafer. The electrical transport characterization at room temperature has shown a large difference between the two kinds of devices and has been interpreted in terms of a huge unexpected series resistance. Electrical characteristics of the Nanoscale device, taken in the linear region, can be analytically derived from the ultrathin device ones. A comparison of the structure and composition of the layers, using advanced techniques such as Focused Ion Beam (FIB) and High Resolution TEM (HRTEM) coupled with Energy Dispersive X-ray Spectroscopy (EDS), contributes an explanation as to the difference of transport between the devices.

Physical Parameters for Reliability Evaluation

This paper presents ageing experiments controlled by the evolution of junction parameters. The deterioration of the device is related to high injection effects which modified the transport mechanisms in the space charge region of the junction. Physical phenomena linked to the degradation of junction parameters that affect the devices reliability are reported and discussed. We have used the method based on numerical analysis of experimental current-voltage characteristic of the junction, in order to extract the electrical parameters. The simultaneous follow-up of the evolutions of the series resistance and of the transition voltage allow us to introduce a new parameter for reliability evaluation.

Fabrication and Characterization of Al/Methyl Orange/n-Si Heterojunction Diode

Herein, the organic semiconductor methyl orange (MO), is investigated for the first time for its electronic applications. For this purpose, Al/MO/n-Si heterojunction is fabricated through economical cheap and simple “drop casting” technique. The currentvoltage (I-V) measurements of the device are made at room temperature under dark conditions. The I-V characteristics of Al/MO/n-Si junction exhibits asymmetrical and rectifying behavior that confirms the formation of diode. The diode parameters such as rectification ratio (RR), turn on voltage (Vturn on), reverse saturation current (I0), ideality factor (n), barrier height ( b f ), series resistance (Rs) and shunt resistance (Rsh) are determined from I-V curves using Schottky equations. These values of these parameters are also extracted and verified by applying Cheung’s functions. The conduction mechanisms are explained from the forward bias I-V characteristics using the power law.

Investigation of Temperature-Dependent Electrical Properties of Tc-CuPc: PCBM Bulk Heterojunction (BHJ) under Dark Conditions

An organic bulk heterojunction (BHJ) was fabricated using a blended film containing Copper (II) tetrakis(4-acumylphenoxy) phthalocyanine (Tc-CuPc) along with [6,6]-Phenyl C61 butyric acid methyl ester (PCBM). Weight ratio between Tc-CuPc and PCBM was 1:1. The electrical properties of Tc-CuPc: PCBM BHJ were examined. Rectifying nature of the BHJ was displayed by current-voltage (I-V) curves, recorded in dark and at various temperatures. At low voltages, conduction was ohmic succeeded by space-charge limiting current (SCLC) conduction at higher voltages in which exponential trap distribution was dominant. Series resistance, shunt resistance, ideality factor, effective barrier height and mobility at room temperature were found to be 526 4, 482 k4, 3.7, 0.17 eV and 2×10-7 cm2V-1s-1 respectively. Temperature effect towards different BHJ parameters was observed under dark condition.

Parameters Estimation of Double Diode Solar Cell Model

A new technique based on Pattern search optimization is proposed for estimating different solar cell parameters in this paper. The estimated parameters are the generated photocurrent, saturation current, series resistance, shunt resistance, and ideality factor. The proposed approach is tested and validated using double diode model to show its potential. Performance of the developed approach is quite interesting which signifies its potential as a promising estimation tool.