Characterization of Responsivity, Sensitivity and Spectral Response in Thin Film SOI photo-BJMOS -FET Compatible with CMOS Technology
Photo-BJMOSFET (Bipolar Junction Metal-Oxide-
Semiconductor Field Effect Transistor) fabricated on SOI film was proposed. ITO film is adopted in the device as gate electrode to reduce
light absorption. Depletion region but not inversion region is formed
in film by applying gate voltage (but low reverse voltage) to achieve
high photo-to-dark-current ratio. Comparisons of photoelectriccharacteristics
executed among VGK=0V, 0.3V, 0.6V, 0.9V and 1.0V
(reverse voltage VAK is equal to 1.0V for total area of 10×10μm2). The
results indicate that the greatest improvement in photo-to-dark-current
ratio is achieved up to 2.38 at VGK=0.6V. In addition,
photo-BJMOSFET is compatible with CMOS integration due to big
input resistance
[1] K. Wang, Y. Vygranenko and A. Nathan, "Optically transparent ZnO-based n-i-p ultraviolet photodetectors" Thin Solid Films, vol515, pp.
6981-6985, June 2007.
[2] Csutak, S.M. Schaub, J.D. Wu, W.E. Shimer, R. Campbell, J.C.,
"CMOS-compatible high-speed planar silicon photodiodes fabricated
onSOI substrates", IEEE J Quantum Electron. vol. 38, pp. 193-196, Feb 2002.
[3] S Nakaharai, T Tezuka, N Hirashita, E Toyoda, Y Moriyama, N Sugiyama,
et al, "The generation of crystal defects in Ge-on-insulator (GOI) layers in
the Ge-condensation process" Semiconductor science and technology.
vol.22, pp. 26-28, Jan 2007.
[4] L Ke, XY Zhao, RS Kumar, SJ Chua," Low frequency optical noise from
organic light emitting diode", Solid-State Electronics, vol. 52, pp. 7-10, Jan 2008.
[5] Afzalian A, Flandre D, " Speed performances of thin-film lateral SOI PIN
photodiodes up to tens of GHz" 2006 IEEE International SOI Conference
Proceedings, pp.83-84 Oct. 2006
[6] S. G. Chamberlain, D. J. Roulston, S. P. Desai, "Spectral response
limitation mechanisms of a shallow junction np photodiode" IEEE
Transactions on Electron Devices, vol.13, pp. 167-172, Jan 1978.
[7] H.S. Wong, "Technology and device scaling considerations for CMOS
imagers" IEEE Trans.Electron Devices, vol. 43, pp. 2131-2142, Dec 1996.
[8] N. H. Zhu, Y. Liu, S. J. Zhang, J. M. Wen, "Bonding-wire compensation
effect on the packaging parasitics of optoelectronic devices" Microwave
and Optical Technology Letters. vol.48, pp.76-79, Jan 2006.
[9] A. J. Blanksby, M. J. Loinaz, "Performance analysis of a color CMOS
photogate image sensor" IEEE Trans ,Electron Devices, vol. 47, pp. 55-64, Jan 2000.
[10] Fábio Alencar Mendonça, Rubens Viana Ramos, "Optical receiver for
instrumentation and communication" Microwave and Optical Technology
Letters, vol. 45, pp. 415-419, May 2005.
[11] Z. Dilli, N. Goldsman, M. Peckerar, A. Akturk and G. Metze, "Design and
testing of a self-powered 3D integrated SOI CMOS system"
Microelectronic Engineering, vol.85, pp. 388-394, Feb 2008.
[12] Csutak SM, Dakshina-Murthy S, Campbell JC, "CMOS-compatible
planar silicon waveguide-grating-ouplerphotodetectors fabricated on
silicon-on-insulator (SOI) substrates" IEEE J Quantum Electron, vol. 38,
pp. 477-480, May 2002.
[13] M Ghioni, F Zappa, VP Kesan, J Warnock, "A VLSI-compatible
high-speed silicon photodetector for optical data link applications" IEEE
Trans. Electron Devices, vol. 43, pp. 1054-1060, June 1996.
[14] Afzalian A, Flandre D, "Physical modeling and design of thin-film SOI
lateral PIN photodiodes" IEEE Trans Electron Dev. vol. 52, pp. 1116-1122, June 2005.
[15] Afzalian A, Flandre D, "Speed performances of thin-film lateral SOI PIN
photodiodes up to tens of GHz" IEEE Electron Lett, vol. 42, pp. 1420-
1421, Nov 2006.
[16] Afzalian A, Flandre D, "Characterization of quantum efficiency, effective
lifetime and mobility in thin film ungated SOI lateral PIN photodiodes "
Solid-State Electronics, vol.51, pp.337-342, Feb 2007.
[17] R Li, JD Schaub, SM Csutak, JC Campbell, "A high-speed monolithic
silicon photoreceiver fabricated on SOI" IEEE Photon Technol. Lett,
vol.12, pp.1046-1048, Aug 2000.
[18] A.Kranti and G. Alastair Armstrong, "Source/drain extension region
engineering in nanoscale double gate SOI MOSFETs: Novel design methodology for low-voltage analog applications " Microelectronic
Engineering, vol.84, pp. 2775-2784, Dec 2007
[1] K. Wang, Y. Vygranenko and A. Nathan, "Optically transparent ZnO-based n-i-p ultraviolet photodetectors" Thin Solid Films, vol515, pp.
6981-6985, June 2007.
[2] Csutak, S.M. Schaub, J.D. Wu, W.E. Shimer, R. Campbell, J.C.,
"CMOS-compatible high-speed planar silicon photodiodes fabricated
onSOI substrates", IEEE J Quantum Electron. vol. 38, pp. 193-196, Feb 2002.
[3] S Nakaharai, T Tezuka, N Hirashita, E Toyoda, Y Moriyama, N Sugiyama,
et al, "The generation of crystal defects in Ge-on-insulator (GOI) layers in
the Ge-condensation process" Semiconductor science and technology.
vol.22, pp. 26-28, Jan 2007.
[4] L Ke, XY Zhao, RS Kumar, SJ Chua," Low frequency optical noise from
organic light emitting diode", Solid-State Electronics, vol. 52, pp. 7-10, Jan 2008.
[5] Afzalian A, Flandre D, " Speed performances of thin-film lateral SOI PIN
photodiodes up to tens of GHz" 2006 IEEE International SOI Conference
Proceedings, pp.83-84 Oct. 2006
[6] S. G. Chamberlain, D. J. Roulston, S. P. Desai, "Spectral response
limitation mechanisms of a shallow junction np photodiode" IEEE
Transactions on Electron Devices, vol.13, pp. 167-172, Jan 1978.
[7] H.S. Wong, "Technology and device scaling considerations for CMOS
imagers" IEEE Trans.Electron Devices, vol. 43, pp. 2131-2142, Dec 1996.
[8] N. H. Zhu, Y. Liu, S. J. Zhang, J. M. Wen, "Bonding-wire compensation
effect on the packaging parasitics of optoelectronic devices" Microwave
and Optical Technology Letters. vol.48, pp.76-79, Jan 2006.
[9] A. J. Blanksby, M. J. Loinaz, "Performance analysis of a color CMOS
photogate image sensor" IEEE Trans ,Electron Devices, vol. 47, pp. 55-64, Jan 2000.
[10] Fábio Alencar Mendonça, Rubens Viana Ramos, "Optical receiver for
instrumentation and communication" Microwave and Optical Technology
Letters, vol. 45, pp. 415-419, May 2005.
[11] Z. Dilli, N. Goldsman, M. Peckerar, A. Akturk and G. Metze, "Design and
testing of a self-powered 3D integrated SOI CMOS system"
Microelectronic Engineering, vol.85, pp. 388-394, Feb 2008.
[12] Csutak SM, Dakshina-Murthy S, Campbell JC, "CMOS-compatible
planar silicon waveguide-grating-ouplerphotodetectors fabricated on
silicon-on-insulator (SOI) substrates" IEEE J Quantum Electron, vol. 38,
pp. 477-480, May 2002.
[13] M Ghioni, F Zappa, VP Kesan, J Warnock, "A VLSI-compatible
high-speed silicon photodetector for optical data link applications" IEEE
Trans. Electron Devices, vol. 43, pp. 1054-1060, June 1996.
[14] Afzalian A, Flandre D, "Physical modeling and design of thin-film SOI
lateral PIN photodiodes" IEEE Trans Electron Dev. vol. 52, pp. 1116-1122, June 2005.
[15] Afzalian A, Flandre D, "Speed performances of thin-film lateral SOI PIN
photodiodes up to tens of GHz" IEEE Electron Lett, vol. 42, pp. 1420-
1421, Nov 2006.
[16] Afzalian A, Flandre D, "Characterization of quantum efficiency, effective
lifetime and mobility in thin film ungated SOI lateral PIN photodiodes "
Solid-State Electronics, vol.51, pp.337-342, Feb 2007.
[17] R Li, JD Schaub, SM Csutak, JC Campbell, "A high-speed monolithic
silicon photoreceiver fabricated on SOI" IEEE Photon Technol. Lett,
vol.12, pp.1046-1048, Aug 2000.
[18] A.Kranti and G. Alastair Armstrong, "Source/drain extension region
engineering in nanoscale double gate SOI MOSFETs: Novel design methodology for low-voltage analog applications " Microelectronic
Engineering, vol.84, pp. 2775-2784, Dec 2007
@article{"International Journal of Engineering, Mathematical and Physical Sciences:63817", author = "Hai-Qing Xie and Yun Zeng and Yong-Hong Yan and Jian-Ping Zeng and Tai-Hong Wang", title = "Characterization of Responsivity, Sensitivity and Spectral Response in Thin Film SOI photo-BJMOS -FET Compatible with CMOS Technology", abstract = "Photo-BJMOSFET (Bipolar Junction Metal-Oxide-
Semiconductor Field Effect Transistor) fabricated on SOI film was proposed. ITO film is adopted in the device as gate electrode to reduce
light absorption. Depletion region but not inversion region is formed
in film by applying gate voltage (but low reverse voltage) to achieve
high photo-to-dark-current ratio. Comparisons of photoelectriccharacteristics
executed among VGK=0V, 0.3V, 0.6V, 0.9V and 1.0V
(reverse voltage VAK is equal to 1.0V for total area of 10×10μm2). The
results indicate that the greatest improvement in photo-to-dark-current
ratio is achieved up to 2.38 at VGK=0.6V. In addition,
photo-BJMOSFET is compatible with CMOS integration due to big
input resistance", keywords = "Photo-BJMOSFET, Responsivity, Sensitivity, Spectral response.", volume = "3", number = "10", pages = "870-5", }
