Abstract: In this paper, a two-stage op-amp design is considered using both Miller and negative Miller compensation techniques. The first op-amp design uses Miller compensation around the second amplification stage, whilst the second op-amp design uses negative Miller compensation around the first stage and Miller compensation around the second amplification stage. The aims of this work were to compare the gain and phase margins obtained using the different compensation techniques and identify the ability to choose either compensation technique based on a particular set of design requirements. The two op-amp designs created are based on the same two-stage rail-to-rail output CMOS op-amp architecture where the first stage of the op-amp consists of differential input and cascode circuits, and the second stage is a class AB amplifier. The op-amps have been designed using a 0.35mm CMOS fabrication process.
Abstract: A new design approach for three-stage operational
amplifiers (op-amps) is proposed. It allows to actually implement a
symmetrical push-pull class-AB amplifier output stage for wellestablished
three-stage amplifiers using a feedforward
transconductance stage. Compared with the conventional design
practice, the proposed approach leads to a significant
improvement of the symmetry between the positive and the
negative op-amp step response, resulting in similar values of the
positive/negative settling time. The new approach proves to be very
useful in order to fully exploit the potentiality allowed by the op-amp
in terms of speed performances. Design examples in a commercial
0.35-μm CMOS prove the effectiveness of theproposed strategy.
Abstract: The design of Class A and Class AB 2-stage X band
Power Amplifier is described in this report. This power amplifier is
part of a transceiver used in radar for monitoring iron characteristics
in a blast furnace. The circuit was designed using foundry WIN
Semiconductors. The specification requires 15dB gain in the linear
region, VSWR nearly 1 at input as well as at the output, an output
power of 10 dBm and good stable performance in the band 10.9-12.2
GHz. The design was implemented by using inter-stage
configuration, the Class A amplifier was chosen for driver stage i.e.
the first amplifier focusing on the gain and the output amplifier
conducted at Class AB with more emphasis on output power.
Abstract: This paper presents a low-voltage low-power differential linear transconductor with near rail-to-rail input swing. Based on the current-mirror OTA topology, the proposed transconductor combines the Flipped Voltage Follower (FVF) technique to linearize the transconductor behavior that leads to class- AB linear operation and the virtual transistor technique to lower the effective threshold voltages of the transistors which offers an advantage in terms of low supply requirement. Design of the OTA has been discussed. It operates at supply voltages of about ±0.8V. Simulation results for 0.18μm TSMC CMOS technology show a good input range of 1Vpp with a high DC gain of 81.53dB and a total harmonic distortion of -40dB at 1MHz for an input of 1Vpp. The main aim of this paper is to present and compare new OTA design with high transconductance, which has a potential to be used in low voltage applications.