A 1.8 V RF CMOS Active Inductor with 0.18 um CMOS Technology

A active inductor in CMOS techonology with a supply voltage of 1.8V is presented. The value of the inductance L can be in the range from 0.12nH to 0.25nH in high frequency(HF). The proposed active inductor is designed in TSMC 0.18-um CMOS technology. The power dissipation of this inductor can retain constant at all operating frequency bands and consume around 20mW from 1.8V power supply. Inductors designed by integrated circuit occupy much smaller area, for this reason,attracted researchers attention for more than decade. In this design we used Advanced Designed System (ADS) for simulating cicuit.

Optimization of HALO Structure Effects in 45nm p-type MOSFETs Device Using Taguchi Method

In this study, the Taguchi method was used to optimize the effect of HALO structure or halo implant variations on threshold voltage (VTH) and leakage current (ILeak) in 45nm p-type Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) device. Besides halo implant dose, the other process parameters which used were Source/Drain (S/D) implant dose, oxide growth temperature and silicide anneal temperature. This work was done using TCAD simulator, consisting of a process simulator, ATHENA and device simulator, ATLAS. These two simulators were combined with Taguchi method to aid in design and optimize the process parameters. In this research, the most effective process parameters with respect to VTH and ILeak are halo implant dose (40%) and S/D implant dose (52%) respectively. Whereas the second ranking factor affecting VTH and ILeak are oxide growth temperature (32%) and halo implant dose (34%) respectively. The results show that after optimizations approaches is -0.157V at ILeak=0.195mA/μm.

Development of a Comprehensive Electricity Generation Simulation Model Using a Mixed Integer Programming Approach

This paper presents the development of an electricity simulation model taking into account electrical network constraints, applied on the Belgian power system. The base of the model is optimizing an extensive Unit Commitment (UC) problem through the use of Mixed Integer Linear Programming (MILP). Electrical constraints are incorporated through the implementation of a DC load flow. The model encloses the Belgian power system in a 220 – 380 kV high voltage network (i.e., 93 power plants and 106 nodes). The model features the use of pumping storage facilities as well as the inclusion of spinning reserves in a single optimization process. Solution times of the model stay below reasonable values.

Fuzzy Logic Speed Controller for Direct Vector Control of Induction Motor

This paper presents a new method for the implementation of a direct rotor flux control (DRFOC) of induction motor (IM) drives. It is based on the rotor flux components regulation. The d and q axis rotor flux components feed proportional integral (PI) controllers. The outputs of which are the target stator voltages (vdsref and vqsref). While, the synchronous speed is depicted at the output of rotor speed controller. In order to accomplish variable speed operation, conventional PI like controller is commonly used. These controllers provide limited good performances over a wide range of operations even under ideal field oriented conditions. An alternate approach is to use the so called fuzzy logic controller. The overall investigated system is implemented using dSpace system based on digital signal processor (DSP). Simulation and experimental results have been presented for a one kw IM drives to confirm the validity of the proposed algorithms.

High Voltage Driver Design for Actuating a MOEMS Mirror Array

In this paper we present a new multichannel high voltage driver box to connect up to six MOEMS mirror devices to it that have resonant and also quasistatically driven actuating electrodes. It is possible to drive all resonant axes synchronously while the amplitude of them can individually be controlled by separate microcontrollers that also operate the quasistatic axes. Circuit simulations are compared with the measurements done on the real system and also show the robust driving performance of a MOEMS mirror.

Improvement in Silicon on Insulator Devices using Strained Si/SiGe Technology for High Performance in RF Integrated Circuits

RF performance of SOI CMOS device has attracted significant amount of interest recently. In order to improve RF parameters, Strained Si/Relaxed Si0.8Ge0.2 investigated as a replacement for Si technology .Enhancement of carrier mobility associated with strain engineering makes Strained Si a promising candidate for improving RF performance of CMOS technology. From the simulation, the cut-off frequency is estimated to be 224 GHZ, whereas in SOI at similar bias is about 188 GHZ. Therefore, Strained Si exhibits 19% improvement in cut-off frequency over similar Si counterpart. In this paper, Ion/Ioff ratio is studied as one of the key parameters in logic and digital application. Strained Si/SiGe demonstrates better Ion/Ioff characteristic than SOI, in similar channel length of 100 nm.Another important key analog figures of merit such as Early Voltage (VEA) ,transconductance vs drain current (gm /Ids) are studied. They introduce the efficiency of the devices to convert dc power into ac frequency.

Depressing Turbine-Generator Supersynchronous Torsional Torques by Using Virtual Inertia

Single-pole switching scheme is widely used in the Extra High Voltage system. However, the substantial negativesequence current injected to the turbine-generators imposes the electromagnetic (E/M) torque of double system- frequency components during the dead time (between single-pole clearing and line reclosing). This would induce supersynchronous resonance (SPSR) torque amplifications on low pressure turbine generator blades and even lead to fatigue damage. This paper proposes the design of a mechanical filter (MF) with natural frequency close to double-system frequency. From the simulation results, it is found that such a filter not only successfully damps the resonant effect, but also has the characteristics of feasibility and compact.

The Performance Analysis of Valveless Micropump with Contoured Nozzle/Diffuser

The operation performance of a valveless micro-pump is strongly dependent on the shape of connected nozzle/diffuser and Reynolds number. The aims of present work are to compare the performance curves of micropump with the original straight nozzle/diffuser and contoured nozzle/diffuser under different back pressure conditions. The tested valveless micropumps are assembled of five pieces of patterned PMMA plates with hot-embracing technique. The structures of central chamber, the inlet/outlet reservoirs and the connected nozzle/diffuser are fabricated with laser cutting machine. The micropump is actuated with circular-type PZT film embraced on the bottom of central chamber. The deformation of PZT membrane with various input voltages is measured with a displacement laser probe. A simple testing facility is also constructed to evaluate the performance curves for comparison. In order to observe the evaluation of low Reynolds number multiple vortex flow patterns within the micropump during suction and pumping modes, the unsteady, incompressible laminar three-dimensional Reynolds-averaged Navier-Stokes equations are solved. The working fluid is DI water with constant thermo-physical properties. The oscillating behavior of PZT film is modeled with the moving boundary wall in way of UDF program. With the dynamic mesh method, the instants pressure and velocity fields are obtained and discussed.Results indicated that the volume flow rate is not monotony increased with the oscillating frequency of PZT film, regardless of the shapes of nozzle/diffuser. The present micropump can generate the maximum volume flow rate of 13.53 ml/min when the operation frequency is 64Hz and the input voltage is 140 volts. The micropump with contoured nozzle/diffuser can provide 7ml/min flow rate even when the back pressure is up to 400 mm-H2O. CFD results revealed that the flow central chamber was occupied with multiple pairs of counter-rotating vortices during suction and pumping modes. The net volume flow rate over a complete oscillating periodic of PZT

Harmonic Elimination of Hybrid Multilevel Inverters Using Particle Swarm Optimization

This paper present the harmonic elimination of hybrid multilevel inverters (HMI) which could be increase the number of output voltage level. Total Harmonic Distortion (THD) is one of the most important requirements concerning performance indices. Because of many numbers output levels of HMI, it had numerous unknown variables of eliminate undesired individual harmonic and THD nonlinear equations set. Optimized harmonic stepped waveform (OHSW) is solving switching angles conventional method, but most complicated for solving as added level. The artificial intelligent techniques are deliberation to solve this problem. This paper presents the Particle Swarm Optimization (PSO) technique for solving switching angles to get minimum THD and eliminate undesired individual harmonics of 15-levels hybrid multilevel inverters. Consequently it had many variables and could eliminate numerous harmonics. Both advantages including high level of inverter and Particle Swarm Optimization (PSO) are used as powerful tools for harmonics elimination.

The Effect of Harmonic Power Fluctuation for Estimating Flicker

Voltage flicker problems have long existed in several of the distribution areas served by the Taiwan Power Company. In the past, those research results indicating that the estimated ΔV10 value based on the conventional method is significantly smaller than the survey value. This paper is used to study the relationship between the voltage flicker problems and harmonic power variation for the power system with electric arc furnaces. This investigation discussed thought the effect of harmonic power fluctuation with flicker estimate value. The method of field measurement, statistics and simulation is used. The survey results demonstrate that 10 ΔV estimate must account for the effect of harmonic power variation.

A New True RMS-to-DC Converter in CMOS Technology

This paper presents a new true RMS-to-DC converter circuit based on a square-root-domain squarer/divider. The circuit is designed by employing up-down translinear loop and using of MOSFET transistors that operate in strong inversion saturation region. The converter offer advantages of two-quadrant input current, low circuit complexity, low supply voltage (1.2V) and immunity from the body effect. The circuit has been simulated by HSPICE. The simulation results are seen to conform to the theoretical analysis and shows benefits of the proposed circuit.

A Single-chip Proportional to Absolute Temperature Sensor Using CMOS Technology

Nowadays it is a trend for electronic circuit designers to integrate all system components on a single-chip. This paper proposed the design of a single-chip proportional to absolute temperature (PTAT) sensor including a voltage reference circuit using CEDEC 0.18m CMOS Technology. It is a challenge to design asingle-chip wide range linear response temperature sensor for many applications. The channel widths between the compensation transistor and the reference transistor are critical to design the PTAT temperature sensor circuit. The designed temperature sensor shows excellent linearity between -100°C to 200° and the sensitivity is about 0.05mV/°C. The chip is designed to operate with a single voltage source of 1.6V.

Two New Low Power High Performance Full Adders with Minimum Gates

with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Comparison of S-transform and Wavelet Transform in Power Quality Analysis

In the power quality analysis non-stationary nature of voltage distortions require some precise and powerful analytical techniques. The time-frequency representation (TFR) provides a powerful method for identification of the non-stationary of the signals. This paper investigates a comparative study on two techniques for analysis and visualization of voltage distortions with time-varying amplitudes. The techniques include the Discrete Wavelet Transform (DWT), and the S-Transform. Several power quality problems are analyzed using both the discrete wavelet transform and S–transform, showing clearly the advantage of the S– transform in detecting, localizing, and classifying the power quality problems.

Compensation–Based Current Decomposition

This paper deals with the current space-vector decomposition in three-phase, three-wire systems on the basis of some case studies. We propose four components of the current spacevector in terms of DC and AC components of the instantaneous active and reactive powers. The term of supplementary useless current vector is also pointed out. The analysis shows that the current decomposition which respects the definition of the instantaneous apparent power vector is useful for compensation reasons only if the supply voltages are sinusoidal. A modified definition of the components of the current is proposed for the operation under nonsinusoidal voltage conditions.

Design and Control of DC-DC Converter for the Military Application Fuel Cell

This paper presents a 24 watts SEPIC converter design and control using microprocessor. SEPIC converter has advantages of a wide input range and miniaturization caused by the low stress at elements. There is also an advantage that the input and output are isolated in MOSFET-off state. This paper presents the PID control through the SEPIC converter transfer function using a DSP and the protective circuit for fuel cell from the over-current and inverse-voltage by using the characteristic of SEPIC converter. Then it derives them through the experiments.

Comparison on Electrode and Ground Arrangements Effect on Heat Transfer under Electric Force in a Channel and a Cavity Flow

This study numerically investigates the effects of Electrohydrodynamic on flow patterns and heat transfer enhancement within a cavity which is on the lower wall of channel. In this simulation, effects of using ground wire and ground plate on the flow patterns are compared. Moreover, the positions of electrode wire respecting with ground are tested in the range of angles θ = 0 - 180o. High electrical voltage exposes to air is 20 kV. Bulk mean velocity and temperature of inlet air are controlled at 0.1 m/s and 60 OC, respectively. The result shows when electric field is applied, swirling flow is appeared in the channel. In addition, swirling flow patterns in the main flow of using ground plate are widely spreader than that of using ground wire. Moreover, direction of swirling flow also affects the flow pattern and heat transfer in a cavity. These cause the using ground wire to give the maximum temperature and heat transfer higher than using ground plate. Furthermore, when the angle is at θ = 60o, high shear flow effect is obtained. This results show high strength of swirling flow and effective heat transfer enhancement.

Difference of Properties on Surface Leakage and Discharge Currents of Porcelain Insulator Material

This paper presents the experimental results of comparison between leakage currents and discharge currents. The leakage currents were obtained on polluted porcelain insulator. Whereas, the discharge currents were obtained on lightly artificial polluted porcelain specimen. The conducted measurements were leakage current or discharge current and applied voltage. The insulator or specimen was in a hermetically sealed chamber, and the current waveforms were analyzed using FFT. The result indicated that the leakage current (LC) on low RH condition the fifth harmonic would be visible, and followed by the seventh harmonic. The insulator had capacitive property. Otherwise, on 99% relative humidity, the fifth harmonic would also be visible, and the phase angle reached up to 12.2 degree. Whereas, on discharge current, the third harmonic would be visible, and followed by fifth harmonic. The third harmonic would increase as pressure reduced. On this condition, the specimen had a non-linear characteristics

Image Sensor Matrix High Speed Simulation

This paper presents a new high speed simulation methodology to solve the long simulation time problem of CMOS image sensor matrix. Generally, for integrating the pixel matrix in SOC and simulating the system performance, designers try to model the pixel in various modeling languages such as VHDL-AMS, SystemC or Matlab. We introduce a new alternative method based on spice model in cadence design platform to achieve accuracy and reduce simulation time. The simulation results indicate that the pixel output voltage maximum error is at 0.7812% and time consumption reduces from 2.2 days to 13 minutes achieving about 240X speed-up for the 256x256 pixel matrix.

Performance Evaluation of a Neural Network based General Purpose Space Vector Modulator

Space Vector Modulation (SVM) is an optimum Pulse Width Modulation (PWM) technique for an inverter used in a variable frequency drive applications. It is computationally rigorous and hence limits the inverter switching frequency. Increase in switching frequency can be achieved using Neural Network (NN) based SVM, implemented on application specific chips. This paper proposes a neural network based SVM technique for a Voltage Source Inverter (VSI). The network proposed is independent of switching frequency. Different architectures are investigated keeping the total number of neurons constant. The performance of the inverter is compared for various switching frequencies for different architectures of NN based SVM. From the results obtained, the network with minimum resource and appropriate word length is identified. The bit precision required for this application is identified. The network with 8-bit precision is implemented in the IC XCV 400 and the results are presented. The performance of NN based general purpose SVM with higher bit precision is discussed.