Abstract: This paper presents the design of a low power second-order continuous-time sigma-delta modulator for low power
applications. The loop filter of this modulator has been implemented based on the nonlinear transconductance-capacitor (Gm-C) by employing current-mode technique. The nonlinear transconductance uses floating gate MOS (FG-MOS) transistors that operate in weak inversion region. The proposed modulator features low power consumption (
Abstract: In this paper, based on a novel synthesis, a set of new simplified circuit design to implement the linguistic-hedge operations for adjusting the fuzzy membership function set is presented. The circuits work in current-mode and employ floating-gate MOS (FGMOS) transistors that operate in weak inversion region. Compared to the other proposed circuits, these circuits feature severe reduction of the elements number, low supply voltage (0.7V), low power consumption (60dB). In this paper, a set of fuzzy linguistic hedge circuits, including absolutely, very, much more, more, plus minus, more or less and slightly, has been implemented in 0.18 mm CMOS process. Simulation results by Hspice confirm the validity of the proposed design technique and show high performance of the circuits.
Abstract: In this paper, a new approach for design of a fully
differential second order current mode continuous-time sigma-delta
modulator is presented. For circuit implementation, square root
domain (SRD) translinear loop based on floating-gate MOS
transistors that operate in saturation region is employed. The
modulator features, low supply voltage, low power consumption
(8mW) and high dynamic range (55dB). Simulation results confirm
that this design is suitable for data converters.
Abstract: This paper presents a new true RMS-to-DC converter
circuit based on a square-root-domain squarer/divider. The circuit is
designed by employing up-down translinear loop and using of
MOSFET transistors that operate in strong inversion saturation
region. The converter offer advantages of two-quadrant input current,
low circuit complexity, low supply voltage (1.2V) and immunity
from the body effect. The circuit has been simulated by HSPICE.
The simulation results are seen to conform to the theoretical analysis
and shows benefits of the proposed circuit.
Abstract: In this paper, a alternative structure method for
continuous time sigma delta modulator is presented. In this
modulator for implementation of integrators in loop filter second
generation current conveyors are employed. The modulator is
designed in CMOS technology and features low power consumption
(65db),
and with 180khZ bandwidth. Simulation results confirm that this
design is suitable for data converters.
Abstract: This paper presents a new configurable decimation
filter for sigma-delta modulators. The filter employs the Pascal-s
triangle-s theorem for building the coefficients of non-recursive
decimation filters. The filter can be connected to the back-end of
various modulators with different output accuracy. In this work two
methods are shown and then compared from area occupation
viewpoint. First method uses the memory and the second one
employs Pascal-s triangle-s method, aiming to reduce required gates.
XILINX ISE v10 is used for implementation and confirmation the
filter.
Abstract: This paper presents a new general technique for analysis of noise in static log-domain translinear circuits. It is demonstrated that employing this technique, leads to a general, simple and routine method of the noise analysis. The circuit has been simulated by HSPICE. The simulation results are seen to conform to the theoretical analysis and shows benefits of the proposed circuit.