International Journal of Electrical, Electronic and Communication Sciences

Distance Estimation for Radar Systems Using DS-UWB Signals

Year: 2013 Volume: 7 Issue: 9 1216 - 1219 Pages

Abstract: In this paper, we propose a distance estimation scheme for radar systems using direct sequence ultra wideband (DS-UWB) signals. The proposed distance estimation scheme averages out the noise by accumulating the correlator outputs of the radar, and thus, helps the radar to employ a short-length DS-UWB signal reducing the correlation processing time. Numerical results confirm that the proposed distance estimation scheme provides a better estimation performance and a reduced correlation processing time compared with those of the conventional DS-UWB radars.

Oxide Based Resistive Random Access Memory Device for High Density Non Volatile Memory Applications

Year: 2013 Volume: 7 Issue: 9 1213 - 1215 Pages

Abstract: In this work, we demonstrated vertical RRAM device fabricated at the sidewall of contact hole structures for possible future 3-D stacking integrations. The fabricated devices exhibit polarity dependent bipolar resistive switching with small operation voltage of less than 1V for both set and reset process. A good retention of memory window ~50 times is maintained after 1000s voltage bias.

Switching Behaviors of HfO2/NiSix Based RRAM

Year: 2013 Volume: 7 Issue: 9 1210 - 1212 Pages

Abstract: This paper presents a study of Ni-silicides as the bottom electrode of HfO2-based RRAM. Various silicidation conditions were used to obtain different Ni concentrations within the Ni-silicide bottom electrode, namely Ni2Si, NiSi, and NiSi2. A 10nm HfO2 switching material and 50nm TiN top electrode was then deposited and etched into 500nm by 500nm square RRAM cells. Cell performance of the Ni2Si and NiSi cells were good, while the NiSi2 cell could not switch reliably, indicating that the presence of Ni in the bottom electrode is important for good switching.

CMOS-Compatible Deposited Materials for Photonic Layers Integrated above Electronic Integrated Circuit

Year: 2013 Volume: 7 Issue: 9 1206 - 1209 Pages

Abstract: Silicon photonics has generated an increasing interest in recent years mainly for optical communications optical interconnects in microelectronic circuits or bio-sensing applications. The development of elementary passive and active components (including detectors and modulators), which are mainly fabricated on the silicon on insulator platform for CMOS-compatible fabrication, has reached such a performance level that the integration challenge of silicon photonics with microelectronic circuits should be addressed. Since crystalline silicon can only be grown from another silicon crystal, making it impossible to deposit in this state, the optical devices are typically limited to a single layer. An alternative approach is to integrate a photonic layer above the CMOS chip using back-end CMOS fabrication process. In this paper, various materials, including silicon nitride, amorphous silicon, and polycrystalline silicon, for this purpose are addressed.

CMOS-Compatible Plasmonic Nanocircuits for On-Chip Integration

Year: 2013 Volume: 7 Issue: 9 1202 - 1205 Pages

Abstract: Silicon photonics is merging as a unified platform for driving photonic based telecommunications and for local photonic based interconnect but it suffers from large footprint as compared with the nanoelectronics. Plasmonics is an attractive alternative for nanophotonics. In this work, two CMOS compatible plasmonic waveguide platforms are compared. One is the horizontal metal-insulator-Si-insulator-metal nanoplasmonic waveguide and the other is metal-insulator-Si hybrid plasmonic waveguide. Various passive and active photonic devices have been experimentally demonstrated based on these two plasmonic waveguide platforms.

Unambiguous Signal Acquisition Based On Recombination of Sub-Correlations of BOC Signals

Year: 2013 Volume: 7 Issue: 9 1197 - 1201 Pages

Abstract: Due to side-peaks of autocorrelation function, the binary offset carrier (BOC) signal acquisition suffers from an ambiguity when one of the side-peaks is acquired. In this paper, we first analyze that the BOC autocorrelation is made up of the sum of subcorrelations, and then, remove the side-peaks causing the ambiguity by recombining the sub-correlations. The proposed scheme is shown to remove the side-peaks completely. From numerical results, it is confirmed that the proposed scheme outperforms the conventional schemes in terms of the receiver operating characteristic and mean acquisition time.

14-Bit 1MS/s Cyclic-Pipelined ADC

Year: 2013 Volume: 7 Issue: 9 1193 - 1196 Pages

Abstract: This paper presents a 14-bit cyclic-pipelined Analog to digital converter (ADC) running at 1 MS/s. The architecture is based on a 1.5-bit per stage structure utilizing digital correction for each stage. The ADC consists of two 1.5-bit stages, one shift register delay line, and digital error correction logic. Inside each 1.5-bit stage, there is one gain-boosting op-amp and two comparators. The ADC was implemented in 0.18µm CMOS process and the design has an area of approximately 0.2 mm2. The ADC has a differential input range of 1.2 Vpp. The circuit has an average power consumption of 3.5mA with 10MHz sampling clocks. The post-layout simulations of the design satisfy 12-bit SNDR with a full-scale sinusoid input.

Investigation of Constant Transconductance Circuit for Low Power Low-Noise Amplifier

Year: 2013 Volume: 7 Issue: 9 1189 - 1192 Pages

Abstract: In this paper, the design of wide-swing constant transconductance (gm) bias circuit that generates bias voltage for low-noise amplifier (LNA) circuit design by using an off-chip resistor is demonstrated. The overall transconductance (Gm) generated by the constant gm bias circuit is important to maintain the overall gain and noise figure of the LNA circuit. Therefore, investigation is performed to study the variation in Gm with process, temperature and supply voltage (PVT). Temperature and supply voltage are swept from -10 °C to 85 °C and 1.425 V to 1.575 V respectively, while the process conditions are also varied to the extreme and the gm variation is eventually concluded at between -3 % to 7 %. With the slight variation in the gm value, through simulation, at worst condition of state SS, we are able to attain a conversion gain (S21) variation of -3.10 % and a noise figure (NF) variation of 18.71 %. The whole constant gm circuit draws approximately 100 µA from a 1.5V supply and is designed based on 0.13 µm CMOS process.

Discrete Wavelet Transform Decomposition Level Determination Exploiting Sparseness Measurement

Year: 2013 Volume: 7 Issue: 9 1185 - 1188 Pages

Abstract: Discrete wavelet transform (DWT) has been widely adopted in biomedical signal processing for denoising, compression and so on. Choosing a suitable decomposition level (DL) in DWT is of paramount importance to its performance. In this paper, we propose to exploit sparseness of the transformed signals to determine the appropriate DL. Simulation results have shown that the sparseness of transformed signals after DWT increases with the increasing DLs. Additional Monte-Carlo simulation results have verified the effectiveness of sparseness measure in determining the DL.

An Area-Efficient and Low-Power Digital Pulse-Width Modulation Controller for DC-DC Switching Power Converter

Year: 2013 Volume: 7 Issue: 9 1181 - 1184 Pages

Abstract: In this paper, a low-power digital controller for DC-DC power conversion was presented. The controller generates the pulse-width modulated (PWM) signal from digital inputs provided by analog-to-digital converter (ADC). An efficient and simple design scheme to develop the control unit was discussed. This method allows minimization of the consumed resources of the chip and it is based on direct digital design approach. In this application, with the proposed scheme, nearly half area and two-third of the power consumption was saved compared to the conventional schemes. This work illustrates the possibility of implementing low-power and area-efficient power management circuit using direct digital design based approach.

Modified Buck Boost Circuit for Linear and Non-Linear Piezoelectric Energy Harvesting

Year: 2013 Volume: 7 Issue: 9 1176 - 1180 Pages

Abstract: Plenty researches have reported techniques to harvest energy from piezoelectric transducer. In the earlier years, the researches mainly report linear energy harvesting techniques whereby interface circuitry is designed to have input impedance that match with the impedance of the piezoelectric transducer. In recent years non-linear techniques become more popular. The non-linear technique employs voltage waveform manipulation to boost the available-for-extraction energy at the time of energy transfer. The fact that non-linear energy extraction provides larger available-for-extraction energy doesn’t mean the linear energy extraction is completely obsolete. In some scenarios, such as where initial power is not available, linear energy extraction is still preferred. A modified Buck Boost circuit which is capable of harvesting piezoelectric energy using both linear and non-linear techniques is reported in this paper. Efficiency of at least 64% can be achieved using this circuit. For linear extraction, the modified Buck Boost circuit is controlled using a fix frequency and duty cycle clock. A voltage sensor and a pulse generator are added as the controller for the non-linear extraction technique.

Low Power Capacitance-to-Voltage Converter for Magnetometer Interface IC

Year: 2013 Volume: 7 Issue: 9 1170 - 1175 Pages

Abstract: This paper presents the design and implementation of a fully integrated Capacitance-to-Voltage Converter (CVC) as the analog front-end for magnetometer interface IC. The application demands very low power solution operating in the frequency of around 20 KHz. The design adapts low power architecture to create low noise electronic interface for Capacitive Micro-machined Lorentz force magnetometer sensor. Using a 0.18-μm CMOS process, simulation results of this interface IC show that the proposed CVC can provide 33 dB closed loop gain, 20 nV/√Hz input referred noise at 20 KHz, while consuming 65 μA current from 1.8-V supply.

Comparison of Router Intelligent and Cooperative Host Intelligent Algorithms in a Continuous Model of Fixed Telecommunication Networks

Year: 2013 Volume: 7 Issue: 9 1161 - 1169 Pages

Abstract: The performance of state of the art worldwide telecommunication networks strongly depends on the efficiency of the applied routing mechanism. Game theoretical approaches to this problem offer new solutions. In this paper a new continuous network routing model is defined to describe data transfer in fixed telecommunication networks of multiple hosts. The nodes of the network correspond to routers whose latency is assumed to be traffic dependent. We propose that the whole traffic of the network can be decomposed to a finite number of tasks, which belong to various hosts. To describe the different latency-sensitivity, utility functions are defined for each task. The model is used to compare router and host intelligent types of routing methods, corresponding to various data transfer protocols. We analyze host intelligent routing as a transferable utility cooperative game with externalities. The main aim of the paper is to provide a framework in which the efficiency of various routing algorithms can be compared and the transferable utility game arising in the cooperative case can be analyzed.

ALD HfO2 Based RRAM with Ti Capping

Year: 2013 Volume: 7 Issue: 9 1159 - 1160 Pages

Abstract: HfOx based Resistive Random Access Memory (RRAM) is one of the most widely studied material stack due to its promising performances as an emerging memory technology. In this work, we systematically investigated the effect of metal capping layer by preparing sample devices with varying thickness of Ti cap and comparing their operating parameters with the help of an Agilent-B1500A analyzer.

Switching Behaviors of TiN/HfOx/Pt Based RRAM

Year: 2013 Volume: 7 Issue: 9 1156 - 1158 Pages

Abstract: Resistive Random Access Memory (RRAM) had received great amount of attention from various research efforts in recent years, owing to its promising performance as a next generation memory device. In this paper, samples based on TiN/HfOx/Pt stack were prepared and its electrical switching behaviors were characterized and discussed in brief.

Low Frequency Noise Behavior of Independent Gate Junctionless FinFET

Year: 2013 Volume: 7 Issue: 9 1153 - 1155 Pages

Abstract: In this paper we use low frequency noise analysis to understand and map the current conduction path in a multi gate junctionless FinFET. The device used in this study behaves as a gated resistor and shows excellent short channel effect suppression due to its multi gate structure. Generally for a bulk conduction device like the junctionless device studied in this work, the low frequency noise can be modelled using the mobility fluctuation model; however for this device we can also see the effect of carrier fluctuations on the LFN characteristic. The noise characteristic at different gate bias and also the possible location of the traps is explained.

Impact of Process Variations on the Vertical Silicon Nanowire Tunneling FET (TFET)

Year: 2013 Volume: 7 Issue: 9 1149 - 1152 Pages

Abstract: This paper presents device simulations on the vertical silicon nanowire tunneling FET (VSiNW TFET). Simulations show that a narrow nanowire and thin gate oxide is required for good performance, which is expected even for conventional MOSFETs. The gate length also needs to be more than the nanowire diameter to prevent short channel effects. An effect more unique to TFET is the need for abrupt source to channel junction, which is shown to improve the performance. The ambipolar effect suppression by reducing drain doping concentration is also explored and shown to have little or no effect on performance.

Measurement Fractional Order Sallen-Key Filters

Year: 2013 Volume: 7 Issue: 12 1561 - 1565 Pages

Abstract: This work aims to generalize the integer order Sallen-Key filters into the fractional-order domain. The analysis in the case of two different fractional-order elements introduced where the general transfer function becomes four terms which is unusual in the conventional case. In addition, the effect of the transfer function parameters on the filter poles and hence the stability is introduced and closed forms for the filter critical frequencies are driven. Finally, different examples for the fractional order Sallen-Key filter design are presented with circuit simulations using ADS where a great matching between the numerical and simulation results is obtained.

Steady State Simulation of Power Systems with Change in Topology

Year: 2013 Volume: 7 Issue: 8 1094 - 1097 Pages

Abstract: In power system protection, the need to know the load current together with the fault level detected by a relay is important. This is due to the fact that the relay is required to isolate the equipment being protected if a fault is present and keep the breaker associated with it closed if the current level is lower than the maximum load level. This is not an issue for a radial system. This is not the same however in a looped power system. In a looped power system, the isolation of an equipment system will contribute to a topology change. The change in the power system topology will then influence or change the maximum load current and the fault level detected by each relay. In this paper, a method of data collection for changing topology using matlab and sim-power will be presented. The method will take into consideration the change in topology and collect data for each possible topology.

Attenuation in Transferred RF Power to a Biomedical Implant due to the Misalignment Coils

Year: 2007 Volume: 1 Issue: 10 1566 - 1570 Pages

Abstract: In biomedical implant field, a new formula is given for the study of Radio Frequency power attenuation by simultaneous effects of side and angular misalignment of the supply/data transfer coils. A confrontation with the practical measurements done into a Faraday cage, allowed a checking of the obtained theoretical results. The DC supply systems without material connection and the data transmitters used in the case of biomedical implants, can be well dimensioned by taking into account the possibility of power attenuation by misalignment of transfer coils