Abstract: This paper proposes a mathematical model for transmission expansion employing optimization method with scenario analysis approach. Economic transmission planning, on the other hand, seeks investment opportunities so that network expansions can generate more economic benefits than the costs. This approach can be used as a decision model for building new transmission lines added to the existing transmission system minimizing costs of the entire system subject to various system’s constraints and consider of loss value of transmission system and N-1 checking. The results show that the proposed model is efficient to be applied for the larger scale of power system topology.
Abstract: Modern industrial processes are based on a large amount of electronic devices such as programmable logic controllers and adjustable speed drives. Unfortunately, electronic devices are sensitive to disturbances, and thus, industrial loads become less tolerant to power quality problems such as sags, swells, and harmonics. Voltage sags are an important power quality problem. In this paper proposed a new configuration of Static Var Compensator (SVC) considering three different conditions named as topologies and Booster transformer with fuzzy logic based controller, capable of compensating for power quality problems associated with voltage sags and maintaining a prescribed level of voltage profile. Fuzzy logic controller is designed to achieve the firing angles for SVC such that it maintains voltage profile. The online monitoring system for voltage sag mitigation in the laboratory using the hardware is used. The results are presented from the performance of each topology and Booster transformer considered in this paper.
Abstract: This paper presents the design, implementation and evaluation of a micro-network, or Network-on-Chip (NoC), based on a generic pipeline router architecture. The router is designed to efficiently support traffic generated by multimedia applications on embedded multi-core systems. It employs a simplest routing mechanism and implements the round-robin scheduling strategy to resolve output port contentions and minimize latency. A virtual channel flow control is applied to avoid the head-of-line blocking problem and enhance performance in the NoC. The hardware design of the router architecture has been implemented at the register transfer level; its functionality is evaluated in the case of the two dimensional Mesh/Torus topology, and performance results are derived from ModelSim simulator and Xilinx ISE 9.2i synthesis tool. An example of a multi-core image processing system utilizing the NoC structure has been implemented and validated to demonstrate the capability of the proposed micro-network architecture. To reduce complexity of the image compression and decompression architecture, the system use image processing algorithm based on classical discrete cosine transform with an efficient zonal processing approach. The experimental results have confirmed that both the proposed image compression scheme and NoC architecture can achieve a reasonable image quality with lower processing time.
Abstract: In power system protection, the need to know the load
current together with the fault level detected by a relay is important.
This is due to the fact that the relay is required to isolate the
equipment being protected if a fault is present and keep the breaker
associated with it closed if the current level is lower than the
maximum load level. This is not an issue for a radial system. This is
not the same however in a looped power system. In a looped power
system, the isolation of an equipment system will contribute to a
topology change. The change in the power system topology will then
influence or change the maximum load current and the fault level
detected by each relay. In this paper, a method of data collection for
changing topology using matlab and sim-power will be presented.
The method will take into consideration the change in topology and
collect data for each possible topology.
Abstract: Brushless DC motor with high torque density and slim
topology for easy loading for robot system is proposed and
manufactured. Electromagnetic design is executed by equivalent
magnetic circuit model and numerical analysis. Manufactured motor is
tested and verified characteristics comparing with conventional BLDC
motor.
Abstract: The porous silicon (PS), formed from the anodization
of a p+ type substrate silicon, consists of a network organized in a
pseudo-column as structure of multiple side ramifications. Structural
micro-topology can be interpreted as the fraction of the interconnected
solid phase contributing to thermal transport. The
reduction of dimensions of silicon of each nanocristallite during the
oxidation induced a reduction in thermal conductivity. Integration of
thermal sensors in the Microsystems silicon requires an effective
insulation of the sensor element. Indeed, the low thermal conductivity
of PS consists in a very promising way in the fabrication of integrated
thermal Microsystems.In this work we are interesting in the
measurements of thermal conductivity (on the surface and in depth)
of PS by the micro-Raman spectroscopy. The thermal conductivity is
studied according to the parameters of anodization (initial doping and
current density. We also, determine porosity of samples by
spectroellipsometry.
Abstract: In this paper, the shape design process is briefly discussed emphasizing the use of topology optimization in the conceptual design stage. The basic idea is to view feasible domains for sensitivity region concepts. In this method, the main process consists of two steps: as the design moves further inside the feasible domain using Taguchi method, and thus becoming more successful topology optimization, the sensitivity region becomes larger. In designing a double-eccentric butterfly valve, related to hydrodynamic performance and disc structure, are discussed where the use of topology optimization has proven to dramatically improve an existing design and significantly decrease the development time of a shape design. Computational Fluid Dynamics (CFD) analysis results demonstrate the validity of this approach.
Abstract: In this treatise we will study the capability of static
compensator for reactive power to stabilize sheen voltage with motor
loading on power networks system. We also explain the structure and main function of STATCOM and the method to control it using STATCOM transformer current to simultaneously predict after
telling about the necessity of FACTS tools to compensate in power networks. Then we study topology and controlling system to stabilize
voltage during start of inductive motor. The outcome of stimulat by MATLAB software supports presented controlling idea and
system in the treatise.
Abstract: This paper presents design, analysis and comparison of the different rotor type permanent magnet machines. The presented machines are designed as having same geometrical dimensions and same materials for comparison. The main machine parameters of interior and exterior rotor type machines including eddy current effect, torque-speed characteristics and magnetic analysis are investigated using MAXWELL program. With this program, the components of the permanent magnet machines can be calculated with high accuracy. Six types of Permanent machines are compared with respect to their topology, size, magnetic field, air gap flux, voltage, torque, loss and efficiency. The analysis results demonstrate the effectiveness of the proposed machines design methodology. We believe that, this study will be a helpful resource in terms of examination and comparison of the basic structure and magnetic features of the PM (Permanent magnet) machines which have different rotor structure.
Abstract: Worm propagation profiles have significantly changed
since 2003-2004: sudden world outbreaks like Blaster or Slammer
have progressively disappeared and slower but stealthier worms
appeared since, most of them for botnets dissemination. Decreased
worm virulence results in more difficult detection.
In this paper, we describe a stealth worm propagation model
which has been extensively simulated and analysed on a huge virtual
network. The main features of this model is its ability to infect any
Internet-like network in a few seconds, whatever may be its size while
greatly limiting the reinfection attempt overhead of already infected
hosts. The main simulation results shows that the combinatorial
topology of routing may have a huge impact on the worm propagation
and thus some servers play a more essential and significant role than
others. The real-time capability to identify them may be essential to
greatly hinder worm propagation.
Abstract: The model of neural networks on the small-world
topology, with metric (local and random connectivity) is investigated.
The synaptic weights are random, driving the network towards a
chaotic state for the neural activity. An ordered macroscopic neuron
state is induced by a bias in the network connections. When the
connections are mainly local, the network emulates a block-like
structure. It is found that the topology and the bias compete to
influence the network to evolve into a global or a block activity
ordering, according to the initial conditions.
Abstract: Genetic Algorithm has been used to solve wide range of optimization problems. Some researches conduct on applying Genetic Algorithm to analog circuit design automation. These researches show a better performance due to the nature of Genetic Algorithm. In this paper a modified Genetic Algorithm is applied for analog circuit design automation. The modifications are made to the topology of the circuit. These modifications will lead to a more computationally efficient algorithm.
Abstract: Genome profiling (GP), a genotype based technology, which exploits random PCR and temperature gradient gel electrophoresis, has been successful in identification/classification of organisms. In this technology, spiddos (Species identification dots) and PaSS (Pattern similarity score) were employed for measuring the closeness (or distance) between genomes. Based on the closeness (PaSS), we can buildup phylogenetic trees of the organisms. We noticed that the topology of the tree is rather robust against the experimental fluctuation conveyed by spiddos. This fact was confirmed quantitatively in this study by computer-simulation, providing the limit of the reliability of this highly powerful methodology. As a result, we could demonstrate the effectiveness of the GP approach for identification/classification of organisms.
Abstract: The success of an electronic system in a System-on- Chip is highly dependent on the efficiency of its interconnection network, which is constructed from routers and channels (the routers move data across the channels between nodes). Since neither classical bus based nor point to point architectures can provide scalable solutions and satisfy the tight power and performance requirements of future applications, the Network-on-Chip (NoC) approach has recently been proposed as a promising solution. Indeed, in contrast to the traditional solutions, the NoC approach can provide large bandwidth with moderate area overhead. The selected topology of the components interconnects plays prime rule in the performance of NoC architecture as well as routing and switching techniques that can be used. In this paper, we present two generic NoC architectures that can be customized to the specific communication needs of an application in order to reduce the area with minimal degradation of the latency of the system. An experimental study is performed to compare these structures with basic NoC topologies represented by 2D mesh, Butterfly-Fat Tree (BFT) and SPIN. It is shown that Cluster mesh (CMesh) and MinRoot schemes achieves significant improvements in network latency and energy consumption with only negligible area overhead and complexity over existing architectures. In fact, in the case of basic NoC topologies, CMesh and MinRoot schemes provides substantial savings in area as well, because they requires fewer routers. The simulation results show that CMesh and MinRoot networks outperforms MESH, BFT and SPIN in main performance metrics.
Abstract: Harmonic pollution and low power factor in power
systems caused by power converters have been of great concern. To
overcome these problems several converter topologies using
advanced semiconductor devices and control schemes have been
proposed. This investigation is to identify a low cost, small size,
efficient and reliable ac to dc converter to meet the input performance
index of UPS. The performance of single phase and three phase ac to
dc converter along with various control techniques are studied and
compared. The half bridge converter topology with linear current
control is identified as most suitable. It is simple, energy efficient
because of single switch power loss and transformer-less operation of
UPS. The results are validated practically using a prototype built
using IGBT and analog controller. The performance for both single
and three-phase system is verified. Digital implementation of closed
loop control achieves higher reliability. Its cost largely depends on
chosen bit precision. The minimal bit precision for optimum
converter performance is identified as 16-bit with fixed-point
operation. From the investigation and practical implementation it is
concluded that half bridge ac – dc converter along with digital linear
controller meets the performance index of UPS for single and three
phase systems.
Abstract: This paper proposes a low-voltage and low-power
fully integrated digitally tuned continuous-time channel selection
filter for WiMAX applications. A 5th-order elliptic low-pass filter is
realized in a Gm-C topology. The bandwidth of the fully differential
filter is reconfigurable from 2.5MHz to 20MHz (8x) for different
requirements in WiMAX applications. The filter is simulated in a
standard 90nm CMOS process. Simulation results show the THD
(@Vout =100mVpp) is less than -66dB. The in-band ripple of the
filter is about 0.15dB. The filter consumes 1.5mW from a supply
voltage of 0.9V.
Abstract: The visualization of geographic information on mobile devices has become popular as the widespread use of mobile Internet. The mobility of these devices brings about much convenience to people-s life. By the add-on location-based services of the devices, people can have an access to timely information relevant to their tasks. However, visual analysis of geographic data on mobile devices presents several challenges due to the small display and restricted computing resources. These limitations on the screen size and resources may impair the usability aspects of the visualization applications. In this paper, a variable-scale visualization method is proposed to handle the challenge of small mobile display. By merging multiple scales of information into a single image, the viewer is able to focus on the interesting region, while having a good grasp of the surrounding context. This is essentially visualizing the map through a fisheye lens. However, the fisheye lens induces undesirable geometric distortion in the peripheral, which renders the information meaningless. The proposed solution is to apply map generalization that removes excessive information around the peripheral and an automatic smoothing process to correct the distortion while keeping the local topology consistent. The proposed method is applied on both artificial and real geographical data for evaluation.
Abstract: Mobile adhoc network (MANET) is a collection of
mobile devices which form a communication network with no preexisting
wiring or infrastructure. Multiple routing protocols have
been developed for MANETs. As MANETs gain popularity, their
need to support real time applications is growing as well. Such
applications have stringent quality of service (QoS) requirements
such as throughput, end-to-end delay, and energy. Due to dynamic
topology and bandwidth constraint supporting QoS is a challenging
task. QoS aware routing is an important building block for QoS
support. The primary goal of the QoS aware protocol is to determine
the path from source to destination that satisfies the QoS
requirements. This paper proposes a new energy and delay aware
protocol called energy and delay aware TORA (EDTORA) based on
extension of Temporally Ordered Routing Protocol (TORA).Energy
and delay verifications of query packet have been done in each node.
Simulation results show that the proposed protocol has a higher
performance than TORA in terms of network lifetime, packet
delivery ratio and end-to-end delay.
Abstract: This paper proposes a neural network weights and
topology optimization using genetic evolution and the
backpropagation training algorithm. The proposed crossover and
mutation operators aims to adapt the networks architectures and
weights during the evolution process. Through a specific inheritance
procedure, the weights are transmitted from the parents to their
offsprings, which allows re-exploitation of the already trained
networks and hence the acceleration of the global convergence of the
algorithm. In the preprocessing phase, a new feature extraction
method is proposed based on Legendre moments with the Maximum
entropy principle MEP as a selection criterion. This allows a global
search space reduction in the design of the networks. The proposed
method has been applied and tested on the well known MNIST
database of handwritten digits.
Abstract: The Indian subcontinent is facing a massive challenge with regards to the energy security in member countries, i.e. providing a reliable source of electricity to facilitate development across various sectors of the economy and thereby achieve the developmental targets it has set for itself. A highly precarious situation exists in the subcontinent which is observed in the series of system failures which most of the times leads to system collapses-blackouts. To mitigate the issues related with energy security as well as keep in check the increasing supply demand gap, a possible solution that stands in front of the subcontinent is the deployment of an interconnected electricity ‘Supergrid’ designed to carry huge quanta of power across the sub continent as well as provide the infra structure for RES integration. This paper assesses the need and conditions for a Supergrid deployment and consequently proposes a meshed topology based on VSC HVDC converters for the Supergrid modeling.