Abstract: .Hardware realization of a Neural Network (NN), to a large extent depends on the efficient implementation of a single neuron. FPGA-based reconfigurable computing architectures are suitable for hardware implementation of neural networks. FPGA realization of ANNs with a large number of neurons is still a challenging task. This paper discusses the issues involved in implementation of a multi-input neuron with linear/nonlinear excitation functions using FPGA. Implementation method with resource/speed tradeoff is proposed to handle signed decimal numbers. The VHDL coding developed is tested using Xilinx XC V50hq240 Chip. To improve the speed of operation a lookup table method is used. The problems involved in using a lookup table (LUT) for a nonlinear function is discussed. The percentage saving in resource and the improvement in speed with an LUT for a neuron is reported. An attempt is also made to derive a generalized formula for a multi-input neuron that facilitates to estimate approximately the total resource requirement and speed achievable for a given multilayer neural network. This facilitates the designer to choose the FPGA capacity for a given application. Using the proposed method of implementation a neural network based application, namely, a Space vector modulator for a vector-controlled drive is presented
Abstract: Harmonic pollution and low power factor in power
systems caused by power converters have been of great concern. To
overcome these problems several converter topologies using
advanced semiconductor devices and control schemes have been
proposed. This investigation is to identify a low cost, small size,
efficient and reliable ac to dc converter to meet the input performance
index of UPS. The performance of single phase and three phase ac to
dc converter along with various control techniques are studied and
compared. The half bridge converter topology with linear current
control is identified as most suitable. It is simple, energy efficient
because of single switch power loss and transformer-less operation of
UPS. The results are validated practically using a prototype built
using IGBT and analog controller. The performance for both single
and three-phase system is verified. Digital implementation of closed
loop control achieves higher reliability. Its cost largely depends on
chosen bit precision. The minimal bit precision for optimum
converter performance is identified as 16-bit with fixed-point
operation. From the investigation and practical implementation it is
concluded that half bridge ac – dc converter along with digital linear
controller meets the performance index of UPS for single and three
phase systems.