Abstract: This paper focuses on the study of DC-to-DC
converters, which are suitable for low-voltage high-power
applications. The output voltages generated by renewable energy
sources such as photovoltaic arrays and fuel cell stacks are
generally low and required to be increased to high voltage levels.
Development of DC-to-DC converters, which provide high step-up
voltage conversion ratios with high efficiencies and low voltage
stresses, is one of the main issues in the development of renewable
energy systems. A procedure for three converters−conventional
DC-to-DC converter, interleaved boost converter, and isolated flyback
based converter, is illustrated for a given set of specifications. The
selection among the converters for the given application is based on
the voltage conversion ratio, efficiency, and voltage stresses.
Abstract: As the Silicon oxide scaled down in MOSFET
technology to few nanometers, gate Direct Tunneling (DT) in
Floating gate (FGMOSFET) devices has become a major concern for
analog designers. FGMOSFET has been used in many low-voltage
and low-power applications, however, there is no accurate model that
account for DT gate leakage in nano-scale. This paper studied and
analyzed different simulation models for FGMOSFET using TSMC
90-nm technology. The simulation results for FGMOSFET cascade
current mirror shows the impact of DT on circuit performance in
terms of current and voltage without the need for fabrication. This
works shows the significance of using an accurate model for
FGMOSFET in nan-scale technologies.
Abstract: Lightning protection systems (LPS) for wind power
generation is becoming an important public issue. A serious damage
of blades, accidents where low-voltage and control circuit
breakdowns are frequently occur in many wind farms. A grounding
system is one of the most important components required for
appropriate LPSs in wind turbines WTs. Proper design of a wind
turbine grounding system is demanding and several factors for the
proper and effective implementation must taken into account. In this
paper proposed procedure of proper design of grounding systems for
a wind turbine was introduced. This procedure depends on measuring
of ground current of simulated wind farm under lightning taking into
consideration the soil ionization. The procedure also includes the
Ground Potential Rise (GPR) and the voltage distributions at ground
surface level and Touch potential. In particular, the contribution of
mitigating techniques, such as rings, rods and the proposed design
were investigated.
Abstract: Power quality has become a very important issue recently due to the impact on electricity suppliers, equipment manufacturers and customers. Power quality is described as the variation of voltage, current and frequency in a power system. Voltage magnitude is one of the major factors that determine the quality of power. Indeed, custom power technology, the low-voltage counterpart of the more widely known flexible ac transmission system (FACTS) technology, aimed at high-voltage power transmission applications, has emerged as a credible solution to solve many problems relating to power quality problems. There are various power quality problems such as voltage sags, swells, flickers, interruptions and harmonics etc. Active Power Filter (APF) is one of the custom power devices and can mitigate harmonics, reactive power and unbalanced load currents originating from load side. In this study, an extensive review of APF studies, the advantages and disadvantages of each introduced methods are presented. The study also helps the researchers to choose the optimum control techniques and power circuit configuration for APF applications.
Abstract: A new design approach for three-stage operational
amplifiers (op-amps) is proposed. It allows to actually implement a
symmetrical push-pull class-AB amplifier output stage for wellestablished
three-stage amplifiers using a feedforward
transconductance stage. Compared with the conventional design
practice, the proposed approach leads to a significant
improvement of the symmetry between the positive and the
negative op-amp step response, resulting in similar values of the
positive/negative settling time. The new approach proves to be very
useful in order to fully exploit the potentiality allowed by the op-amp
in terms of speed performances. Design examples in a commercial
0.35-μm CMOS prove the effectiveness of theproposed strategy.
Abstract: This paper proposes a low-voltage and low-power
fully integrated digitally tuned continuous-time channel selection
filter for WiMAX applications. A 5th-order elliptic low-pass filter is
realized in a Gm-C topology. The bandwidth of the fully differential
filter is reconfigurable from 2.5MHz to 20MHz (8x) for different
requirements in WiMAX applications. The filter is simulated in a
standard 90nm CMOS process. Simulation results show the THD
(@Vout =100mVpp) is less than -66dB. The in-band ripple of the
filter is about 0.15dB. The filter consumes 1.5mW from a supply
voltage of 0.9V.
Abstract: This paper presents a low-voltage low-power differential linear transconductor with near rail-to-rail input swing. Based on the current-mirror OTA topology, the proposed transconductor combines the Flipped Voltage Follower (FVF) technique to linearize the transconductor behavior that leads to class- AB linear operation and the virtual transistor technique to lower the effective threshold voltages of the transistors which offers an advantage in terms of low supply requirement. Design of the OTA has been discussed. It operates at supply voltages of about ±0.8V. Simulation results for 0.18μm TSMC CMOS technology show a good input range of 1Vpp with a high DC gain of 81.53dB and a total harmonic distortion of -40dB at 1MHz for an input of 1Vpp. The main aim of this paper is to present and compare new OTA design with high transconductance, which has a potential to be used in low voltage applications.
Abstract: In this paper, half bridge DC-DC converters with
transformer isolation presented in the literature are analyzed for highcurrent
and low-voltage applications under the same operation
conditions, and compared in terms of losses and efficiency. The
conventional and improved half-bridge DC-DC converters are
simulated, and current and voltage waveforms are obtained for input
voltage Vdc=500V, output current IO=450A, output voltage VO=38V
and switching frequency fS=20kHz. IGBTs are used as power
semiconductor switches. The power losses of the semiconductor
devices are calculated from current and voltage waveforms. From
simulation results, it is seen that the capacitor switched half bridge
converter has the best efficiency value, and can be preferred at high
power and high frequency applications.
Abstract: In this paper we present a linear autozeroing ultra lowvoltage amplifier. The autozeroing performed by all ULV circuits is important to reduce the impact of noise and especially avoid power supply noise in mixed signal low-voltage CMOS circuits. The simulated data presented is relevant for a 90nm TSMC CMOS process.
Abstract: A new low-voltage floating gate MOSFET (FGMOS)
based squarer using square law characteristic of the FGMOS is
proposed in this paper. The major advantages of the squarer are simplicity,
rail-to-rail input dynamic range, low total harmonic distortion,
and low power consumption. The proposed circuit is biased without
body effect. The circuit is designed and simulated using SPICE in
0.25μm CMOS technology. The squarer is operated at the supply
voltages of ±0.75V . The total harmonic distortion (THD) for the
input signal 0.75Vpp at 25 KHz, and maximum power consumption
were found to be less than 1% and 319μW respectively.
Abstract: The objective of this paper is to study the electrical
resistivity complexity between field and laboratory measurement, in
order to improve the effectiveness of data interpretation for
geophysical ground resistivity survey. The geological outcrop in
Penang, Malaysia with an obvious layering contact was chosen as the
study site. Two dimensional geoelectrical resistivity imaging were
used in this study to maps the resistivity distribution of subsurface,
whereas few subsurface sample were obtained for laboratory
advance. In this study, resistivity of samples in original conditions is
measured in laboratory by using time domain low-voltage technique,
particularly for granite core sample and soil resistivity measuring set
for soil sample. The experimentation results from both schemes are
studied, analyzed, calibrated and verified, including basis and
correlation, degree of tolerance and characteristics of substance.
Consequently, the significant different between both schemes is
explained comprehensively within this paper.
Abstract: This paper presents a new circuit arrangement for a
current-mode Wheatstone bridge that is suitable for low-voltage
integrated circuits implementation. Compared to the other proposed
circuits, this circuit features severe reduction of the elements number,
low supply voltage (1V) and low power consumption (
Abstract: This paper describes a low-voltage and low-power
channel selection analog front end with continuous-time low pass
filters and highly linear programmable gain amplifier (PGA). The
filters were realized as balanced Gm-C biquadratic filters to achieve a
low current consumption. High linearity and a constant wide
bandwidth are achieved by using a new transconductance (Gm) cell.
The PGA has a voltage gain varying from 0 to 65dB, while
maintaining a constant bandwidth. A filter tuning circuit that requires
an accurate time base but no external components is presented.
With a 1-Vrms differential input and output, the filter achieves
-85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA
were implemented in a 0.18um 1P6M n-well CMOS process. They
consume 3.2mW from a 1.8V power supply and occupy an area of
0.19mm2.
Abstract: In this paper we ultra low-voltage and high speed CMOS domino logic. For supply voltages below 500mV the delay for a ultra low-voltage NAND2 gate is aproximately 10% of a complementary CMOS inverter. Furthermore, the delay variations due to mismatch is much less than for conventional CMOS. Differential domino gates for AND/NAND and OR/NOR operation are presented.