Abstract: A new first order all-pass filter topology realized using current controlled current conveyors (CCCIIs) is introduced in this paper. Offered benefits are the high-impedance of the input node, the absence of external resistors because of the usage of CCCIIs with positive and negative intrinsic resistances, the presence of only grounded capacitors, and the capability of electronic adjustment of the phase shift through a single bias current. The correct operation of the introduced topology is conformed through simulation results, while its behavior is evaluated through comparison results.
Abstract: A new low-voltage floating gate MOSFET (FGMOS)
based squarer using square law characteristic of the FGMOS is
proposed in this paper. The major advantages of the squarer are simplicity,
rail-to-rail input dynamic range, low total harmonic distortion,
and low power consumption. The proposed circuit is biased without
body effect. The circuit is designed and simulated using SPICE in
0.25μm CMOS technology. The squarer is operated at the supply
voltages of ±0.75V . The total harmonic distortion (THD) for the
input signal 0.75Vpp at 25 KHz, and maximum power consumption
were found to be less than 1% and 319μW respectively.