Abstract: A precision CMOS chopping amplifier is adopted in this work to improve a CMOS temperature sensor high sensitive enough for intracranial temperature monitoring. An amplified temperature sensitivity of 18.8 ± 3*0.2 mV/oC is attained over the temperature range from 20 oC to 80 oC from a given 10 samples of the same wafer. The analog frontend design outputs the temperature dependent and the temperature independent signals which can be directly interfaced to a 10 bit ADC to accomplish an accurate temperature instrumentation system.
Abstract: We fabricated the inverted-staggered etch stopper
structure oxide-based TFT and investigated the characteristics of oxide
TFT under the 400 nm wavelength light illumination. When 400 nm
light was illuminated, the threshold voltage (Vth) decreased and
subthreshold slope (SS) increased at forward sweep, while Vth and SS
were not altered when larger wavelength lights, such as 650 nm, 550
nm and 450 nm, were illuminated. At reverse sweep, the transfer curve
barely changed even under 400 nm light. Our experimental results
support that photo-induced hole carriers are captured by donor-like
interface trap and it caused the decrease of Vth and increase of SS. We
investigated the interface trap density increases proportionally to the
photo-induced hole concentration at active layer.
Abstract: The source voltage of high-power fuel cell shows strong load dependence at comparatively low voltage levels. In order to provide the voltage of 750V on the DC-link for feeding electrical energy into the mains via a three phase inverter a step-up converter with a large step-up ratio is required. The output voltage of this DC/DC-converter must be stabile during variations of the load current and the voltage of the fuel cell. This paper presents the methods and results of the calculation of the efficiency and the expense for the realization for the circuits of the DC/DC-converter that meet these requirements.
Abstract: In this paper, we have compared the performance of a Turbo and Trellis coded optical code division multiple access (OCDMA) system. The comparison of the two codes has been accomplished by employing optical orthogonal codes (OOCs). The Bit Error Rate (BER) performances have been compared by varying the code weights of address codes employed by the system. We have considered the effects of optical multiple access interference (OMAI), thermal noise and avalanche photodiode (APD) detector noise. Analysis has been carried out for the system with and without double optical hard limiter (DHL). From the simulation results it is observed that a better and distinct comparison can be drawn between the performance of Trellis and Turbo coded systems, at lower code weights of optical orthogonal codes for a fixed number of users. The BER performance of the Turbo coded system is found to be better than the Trellis coded system for all code weights that have been considered for the simulation. Nevertheless, the Trellis coded OCDMA system is found to be better than the uncoded OCDMA system. Trellis coded OCDMA can be used in systems where decoding time has to be kept low, bandwidth is limited and high reliability is not a crucial factor as in local area networks. Also the system hardware is less complex in comparison to the Turbo coded system. Trellis coded OCDMA system can be used without significant modification of the existing chipsets. Turbo-coded OCDMA can however be employed in systems where high reliability is needed and bandwidth is not a limiting factor.
Abstract: The asymmetric trafc between uplink and downlink
over recent mobile communication systems has been conspicuous because
of providing new communication services. This paper proposes
an asymmetric trafc accommodation scheme adopting a multihop
cooperative transmission technique for CDMA/FDD cellular networks.
The proposed scheme employs the cooperative transmission
technique in the already proposed downlink multihop transmissions
for the accommodation of the asymmetric trafc, which utilizes
the vacant uplink band for the downlink relay transmissions. The
proposed scheme reduces the transmission power at the downlink
relay transmissions and then suppresses the interference to the uplink
communications, and thus, improves the uplink performance. The
proposed scheme is evaluated by computer simulation and the results
show that it can achieve better throughput performance.
Abstract: This paper presents dynamic voltage collapse prediction on an actual power system using support vector machines.
Dynamic voltage collapse prediction is first determined based on the PTSI calculated from information in dynamic simulation output. Simulations were carried out on a practical 87 bus test system by considering load increase as the contingency. The data collected from the time domain simulation is then used as input to the SVM in which support vector regression is used as a predictor to determine the
dynamic voltage collapse indices of the power system. To reduce training time and improve accuracy of the SVM, the Kernel function type and Kernel parameter are considered. To verify the
effectiveness of the proposed SVM method, its performance is compared with the multi layer perceptron neural network (MLPNN). Studies show that the SVM gives faster and more accurate results for dynamic voltage collapse prediction compared with the MLPNN.
Abstract: In this paper, Optimum adaptive loading algorithms
are applied to multicarrier system with Space-Time Block Coding
(STBC) scheme associated with space-time processing based on
singular-value decomposition (SVD) of the channel matrix over
Rayleigh fading channels. SVD method has been employed in
MIMO-OFDM system in order to overcome subchannel interference.
Chaw-s and Compello-s algorithms have been implemented to obtain
a bit and power allocation for each subcarrier assuming instantaneous
channel knowledge. The adaptive loaded SVD-STBC scheme is
capable of providing both full-rate and full-diversity for any number
of transmit antennas. The effectiveness of these techniques has
demonstrated through the simulation of an Adaptive loaded SVDSTBC
system, and the comparison shown that the proposed
algorithms ensure better performance in the case of MIMO.
Abstract: Energy generated by the force of water in hydropower
can provide a more sustainable, non-polluting alternative to fossil
fuels, along with other renewable sources of energy, such as wind,
solar and tidal power, bio energy and geothermal energy. Small scale
hydroelectricity in Iran is well suited for “off-grid" rural electricity
applications, while other renewable energy sources, such as wind,
solar and biomass, can be beneficially used as fuel for pumping
groundwater for drinking and small scale irrigation in remote rural
areas or small villages. Small Hydro Power plants in Iran have very
low operating and maintenance costs because they consume no fossil
or nuclear fuel and do not involve high temperature processes. The
equipment is relatively simple to operate and maintain. Hydropower
equipment can adjust rapidly to load changes. The extended
equipment life provides significant economic advantages. Some
hydroelectric plants installed 100 years ago still operate reliably. The
Polkolo river is located on Karun basin at southwest of Iran. Situation
and conditions of Polkolo river are evaluated for construction of
small hydropower in this article. The topographical conditions and
the existence of permanent water from springs provide the suitability
to install hydroelectric power plants on the river Polkolo. The
cascade plant consists of 9 power plants connected with each other
and is having the total head as 1100m and discharge about 2.5cubic
meter per second. The annual production of energy is 105.5 million
kwh.
Abstract: An optimized design of E/O and O/E for access points
of WiMAX RoF was carried out by evaluating RCE. The use of the
DFB-LD, a low input-impedance driving, a low distortion PIN-PD,
and a high gain EPHEMT amplifier is promising the cost-effective
design. For the uplink RoF design, the use of EDFA and EP-HEMT
amplifiers is necessity.
Abstract: This paper presents the results of a preventive maintenance application-based study and modeling of failure rates in breakers of electrical distribution systems. This is a critical issue in the reliability assessment of a system. In the analysis conducted in this paper, the impacts of failure rate variations caused by a preventive maintenance are examined. This is considered as a part of a Reliability Centered Maintenance (RCM) application program. A number of load point reliability indices is derived using the mathematical model of the failure rate, which is established using the observed data in a distribution system.
Abstract: A digital system is proposed for low power 100-
channel neural recording system in this paper, which consists of 100
amplifiers, 100 analog-to-digital converters (ADC), digital controller
and baseband, transceiver for data link and RF command link. The
proposed system is designed in a 0.18 μm CMOS process and 65 nm
CMOS process.
Abstract: This paper presents a low-voltage low-power differential linear transconductor with near rail-to-rail input swing. Based on the current-mirror OTA topology, the proposed transconductor combines the Flipped Voltage Follower (FVF) technique to linearize the transconductor behavior that leads to class- AB linear operation and the virtual transistor technique to lower the effective threshold voltages of the transistors which offers an advantage in terms of low supply requirement. Design of the OTA has been discussed. It operates at supply voltages of about ±0.8V. Simulation results for 0.18μm TSMC CMOS technology show a good input range of 1Vpp with a high DC gain of 81.53dB and a total harmonic distortion of -40dB at 1MHz for an input of 1Vpp. The main aim of this paper is to present and compare new OTA design with high transconductance, which has a potential to be used in low voltage applications.
Abstract: This paper addresses the problem of forbidden states in
non safe Petri Nets. In the system, for preventing it from entering the
forbidden states, some linear constraints can be assigned to them.
Then these constraints can be enforced on the system using control
places. But when the number of constraints in the system is large, a
large number of control places must be added to the model of system.
This concept complicates the model of system. There are some
methods for reducing the number of constraints in safe Petri Nets.
But there is no a systematic method for non safe Petri Nets. In this
paper we propose a method for reducing the number of constraints in
non safe Petri Nets which is based on solving an integer linear
programming problem.
Abstract: One of the most challengeable issues in ESL
(Electronic System Level) design is the lack of a general modeling
scheme for on chip communication architecture. In this paper some
of the mostly used methodologies for modeling and representation of
on chip communication are investigated. Our goal is studying the
existing methods to extract the requirements of a general
representation scheme for communication architecture synthesis. The
next step, will be introducing a modeling and representation method
for being used in automatically synthesis process of on chip
communication architecture.
Abstract: The purpose of this study is to suggest energy efficient
routing for ad hoc networks which are composed of nodes with limited
energy. There are diverse problems including limitation of energy
supply of node, and the node energy management problem has been
presented. And a number of protocols have been proposed for energy
conservation and energy efficiency. In this study, the critical point of
the EA-MPDSR, that is the type of energy efficient routing using only
two paths, is improved and developed. The proposed TP-MESR uses
multi-path routing technique and traffic prediction function to increase
number of path more than 2. It also verifies its efficiency compared to
EA-MPDSR using network simulator (NS-2). Also, To give a
academic value and explain protocol systematically, research
guidelines which the Hevner(2004) suggests are applied. This
proposed TP-MESR solved the existing multi-path routing problem
related to overhead, radio interference, packet reassembly and it
confirmed its contribution to effective use of energy in ad hoc
networks.
Abstract: In this paper, we study FPGA implementation of a
novel supra-optimal receiver diversity combining technique,
generalized maximal ratio combining (GMRC), for wireless
transmission over fading channels in SIMO systems. Prior
published results using ML-detected GMRC diversity signal
driven by BPSK showed superior bit error rate performance to
the widely used MRC combining scheme in an imperfect
channel estimation (ICE) environment. Under perfect channel
estimation conditions, the performance of GMRC and MRC
were identical. The main drawback of the GMRC study was
that it was theoretical, thus successful FPGA implementation
of it using pipeline techniques is needed as a wireless
communication test-bed for practical real-life situations.
Simulation results showed that the hardware implementation
was efficient both in terms of speed and area. Since diversity
combining is especially effective in small femto- and picocells,
internet-associated wireless peripheral systems are to
benefit most from GMRC. As a result, many spinoff
applications can be made to the hardware of IP-based 4th
generation networks.
Abstract: An Ad hoc wireless network comprises of mobile
terminals linked and communicating with each other sans the aid of
traditional infrastructure. Optimized Link State Protocol (OLSR) is a
proactive routing protocol, in which routes are discovered/updated
continuously so that they are available when needed. Hello messages
generated by a node seeks information about its neighbor and if the
latter fails to respond to a specified number of hello messages
regulated by neighborhood hold time, the node is forced to assume
that the neighbor is not in range. This paper proposes to evaluate
OLSR routing protocol in a random mobility network having various
neighborhood hold time intervals. The throughput and delivery ratio
are also evaluated to learn about its efficiency for multimedia loads.
Abstract: The experimental and theoretical results of a ZVS
(Zero Voltage Switching) isolated flyback DC-DC converter using
multilayered coreless PCB step down 2:1 transformer are presented.
The performance characteristics of the transformer are shown which
are useful for the parameters extraction. The measured energy
efficiency of the transformer is found to be more than 94% with the
sinusoidal input voltage excitation. The designed flyback converter
has been tested successfully upto the output power level of 10W,
with a switching frequency in the range of 2.7MHz-4.3MHz. The
input voltage of the converter is varied from 25V-40V DC.
Frequency modulation technique is employed by maintaining
constant off time to regulate the output voltage of the converter. The
energy efficiency of the isolated flyback converter circuit under ZVS
condition in the MHz frequency region is found to be approximately
in the range of 72-84%. This paper gives the comparative results in
terms of the energy efficiency of the hard switched and soft switched
flyback converter in the MHz frequency region.
Abstract: In this paper a PID control strategy using neural
network adaptive RASP1 wavelet for WECS-s control is proposed.
It is based on single layer feedforward neural networks with hidden
nodes of adaptive RASP1 wavelet functions controller and an infinite
impulse response (IIR) recurrent structure. The IIR is combined by
cascading to the network to provide double local structure resulting
in improving speed of learning. This particular neuro PID controller
assumes a certain model structure to approximately identify the
system dynamics of the unknown plant (WECS-s) and generate the
control signal. The results are applied to a typical turbine/generator
pair, showing the feasibility of the proposed solution.
Abstract: In this paper, a novel method using Bees Algorithm is proposed to determine the optimal allocation of FACTS devices for maximizing the Available Transfer Capability (ATC) of power transactions between source and sink areas in the deregulated power system. The algorithm simultaneously searches the FACTS location, FACTS parameters and FACTS types. Two types of FACTS are simulated in this study namely Thyristor Controlled Series Compensator (TCSC) and Static Var Compensator (SVC). A Repeated Power Flow with FACTS devices including ATC is used to evaluate the feasible ATC value within real and reactive power generation limits, line thermal limits, voltage limits and FACTS operation limits. An IEEE30 bus system is used to demonstrate the effectiveness of the algorithm as an optimization tool to enhance ATC. A Genetic Algorithm technique is used for validation purposes. The results clearly indicate that the introduction of FACTS devices in a right combination of location and parameters could enhance ATC and Bees Algorithm can be efficiently used for this kind of nonlinear integer optimization.