Abstract: This study introduces two types of self-oscillating
circuits that are frequently found in power electronics applications.
Special effort is made to relate the circuits to the analogous mechanical
systems of some important scientific inventions: Galileo’s pendulum
clock and Coulomb’s friction model. A little touch of related history
and philosophy of science will hopefully encourage curiosity, advance
the understanding of self-oscillating systems and satisfy the aspiration
of some students for scientific literacy. Finally, the two self-oscillating
circuits are applied to design a simple class-D audio amplifier.
Abstract: The Sigma-Delta A/D converters have been proposed
as a practical application for A/D conversion at high rates because of
its simplicity and robustness to imperfections in the circuit, also
because the traditional converters are more difficult to implement in
VLSI technology. These difficulties with conventional conversion
methods need precise analog components in their filters and
conversion circuits, and are more vulnerable to noise and
interference. This paper aims to analyze the architecture, function and
application of Analog-Digital converters (A/D) Sigma-Delta to
overcome these difficulties, showing some simulations using the
Simulink software and Multisim.
Abstract: Today, design requirements are extending more and
more from electronic (analogue and digital) to multidiscipline design.
These current needs imply implementation of methodologies to make
the CAD product reliable in order to improve time to market, study
costs, reusability and reliability of the design process.
This paper proposes a high level design approach applied for the
characterization and the optimization of Switched-Current Sigma-
Delta Modulators. It uses the new hardware description language
VHDL-AMS to help the designers to optimize the characteristics of
the modulator at a high level with a considerably reduced CPU time
before passing to a transistor level characterization.
Abstract: This paper proposes a feed-forward control in
resonant dc link inverter. The feed-forward control configuration is
based on synchronous sigma-delta modulation. The simulation
results showing the proposed technique can reject non-ideal dc bus
improving the total harmonic distortion.
Abstract: A kind of behavior model for discrete sampling and hold amplifier with charge transmission is analyzed. The transfer function and behavior features are based on the main AC responses of operation amplifier. The result used in pipelined and sigma-delta ADC shows the exact of model of sampling and hold amplifier, and the non-ideal factors are taken into account.
Abstract: Time interleaved sigma-delta (TIΣΔ) architecture is a
potential candidate for high bandwidth analog to digital converters
(ADC) which remains a bottleneck for software and cognitive radio
receivers. However, the performance of the TIΣΔ architecture is
limited by the unavoidable gain and offset mismatches resulting
from the manufacturing process. This paper presents a novel digital
calibration method to compensate the gain and offset mismatch
effect. The proposed method takes advantage of the reconstruction
digital signal processing on each channel and requires only few logic
components for implementation. The run time calibration is estimated
to 10 and 15 clock cycles for offset cancellation and gain mismatch
calibration respectively.
Abstract: This paper presents the design of a low power second-order continuous-time sigma-delta modulator for low power
applications. The loop filter of this modulator has been implemented based on the nonlinear transconductance-capacitor (Gm-C) by employing current-mode technique. The nonlinear transconductance uses floating gate MOS (FG-MOS) transistors that operate in weak inversion region. The proposed modulator features low power consumption (
Abstract: This paper presents a method of reducing the feedback
delay time of DWA(Data Weighted Averaging) used in sigma-delta
modulators. The delay time reduction results from the elimination of
the latch at the quantizer output and also from the falling edge
operation. The designed sigma-delta modulator improves the timing
margin about 16%. The sub-circuits of sigma-delta modulator such as
SC(Switched Capacitor) integrator, 9-level quantizer, comparator, and
DWA are designed with the non-ideal characteristics taken into
account. The sigma-delta modulator has a maximum SNR (Signal to
Noise Ratio) of 84 dB or 13 bit resolution.
Abstract: The demand for new telecommunication services requiring higher capacities, data rates and different operating modes have motivated the development of new generation multi-standard wireless transceivers. A multi-standard design often involves extensive system level analysis and architectural partitioning, typically requiring extensive calculations. In this research, a decimation filter design tool for wireless communication standards consisting of GSM, WCDMA, WLANa, WLANb, WLANg and WiMAX is developed in MATLAB® using GUIDE environment for visual analysis. The user can select a required wireless communication standard, and obtain the corresponding multistage decimation filter implementation using this toolbox. The toolbox helps the user or design engineer to perform a quick design and analysis of decimation filter for multiple standards without doing extensive calculation of the underlying methods.
Abstract: In this paper, a new approach for design of a fully
differential second order current mode continuous-time sigma-delta
modulator is presented. For circuit implementation, square root
domain (SRD) translinear loop based on floating-gate MOS
transistors that operate in saturation region is employed. The
modulator features, low supply voltage, low power consumption
(8mW) and high dynamic range (55dB). Simulation results confirm
that this design is suitable for data converters.
Abstract: The modern telecommunication industry demands
higher capacity networks with high data rate. Orthogonal frequency
division multiplexing (OFDM) is a promising technique for high data
rate wireless communications at reasonable complexity in wireless
channels. OFDM has been adopted for many types of wireless
systems like wireless local area networks such as IEEE 802.11a, and
digital audio/video broadcasting (DAB/DVB). The proposed research
focuses on a concatenated coding scheme that improve the
performance of OFDM based wireless communications. It uses a
Redundant Residue Number System (RRNS) code as the outer code
and a convolutional code as the inner code. Here, a direct conversion
of analog signal to residue domain is done to reduce the conversion
complexity using sigma-delta based parallel analog-to-residue
converter. The bit error rate (BER) performances of the proposed
system under different channel conditions are investigated. These
include the effect of additive white Gaussian noise (AWGN),
multipath delay spread, peak power clipping and frame start
synchronization error. The simulation results show that the proposed
RRNS-Convolutional concatenated coding (RCCC) scheme provides
significant improvement in the system performance by exploiting the
inherent properties of RRNS.
Abstract: This paper presents a new configurable decimation
filter for sigma-delta modulators. The filter employs the Pascal-s
triangle-s theorem for building the coefficients of non-recursive
decimation filters. The filter can be connected to the back-end of
various modulators with different output accuracy. In this work two
methods are shown and then compared from area occupation
viewpoint. First method uses the memory and the second one
employs Pascal-s triangle-s method, aiming to reduce required gates.
XILINX ISE v10 is used for implementation and confirmation the
filter.
Abstract: A behavioral model of a second order switchedcapacitor Sigma-Delta modulator is presented. The purpose of this work is the presentation of a behavioral model of a second order switched capacitor ΣΔ modulator considering (Error due to Clock Jitter, Thermal noise Amplifier Noise, Amplifier Slew-Rate, Non linearity of amplifiers, Gain error, Charge Injection, Clock Feedthrough, and Nonlinear on-resistance). A comparison between the use of MOS switches and the use transmission gate switches use is analyzed.
Abstract: This paper proposes a feed-forward control in a halfbridge
resonant dc link inverter. The configuration of feed-forward
control is based on synchronous sigma-delta modulation and the halfbridge
resonant dc link inverter consists of two inductors, one
capacitor and two power switches. The simulation results show the
proposed technique can reject non-ideal dc bus improving the total
harmonic distortion.