Decimation Filter Design Toolbox for Multi-Standard Wireless Transceivers using MATLAB

The demand for new telecommunication services requiring higher capacities, data rates and different operating modes have motivated the development of new generation multi-standard wireless transceivers. A multi-standard design often involves extensive system level analysis and architectural partitioning, typically requiring extensive calculations. In this research, a decimation filter design tool for wireless communication standards consisting of GSM, WCDMA, WLANa, WLANb, WLANg and WiMAX is developed in MATLAB® using GUIDE environment for visual analysis. The user can select a required wireless communication standard, and obtain the corresponding multistage decimation filter implementation using this toolbox. The toolbox helps the user or design engineer to perform a quick design and analysis of decimation filter for multiple standards without doing extensive calculation of the underlying methods.





References:
[1] Paul Gray and Robert Meyer. "Future directions in silicon ICs for RF
personal communications," Proceedings, 1995 Custom Integrated
Circuits Conference, pp. 83-90, May 1995.
[2] C. J. Barrett. "Low-power decimation filter design for multi-standard
transceiver applications", Master of. Science in Electrical Engineering,
University of California, Berkeley.
[3] S. R. Norsworthy, R. Schreier and G. C. Temes. Delta-Sigma Data
Converters, Theory, Design, and Simulation, Piscataway, NJ: IEEE
Press, 1997.
[4] Y. Gao, L. Jia and H. Tenhunen. "A fifth-order comb decimation filter
for multi-standard transceiver applications", ISCAS 2000 - IEEE
International Symposium on Circuits and Systems, Switzerland, May
28-31, 2000.
[5] A. Ghazel, L. Naviner and K. Grati. "Design of down-sampling
processors for radio communications", Analog Integrated Circuits and
Signal Processing, 36, Kluwer academic publishers, pp. 31-38, 2003.
[6] J. Luis Tecpanecatl, Ashok Kumar and M. A. Bayoumi, "Low
complexity decimation filter for multistandard digital receivers", IEEE
International Symposium on Circuits and Systems, (ISCAS 2005), Vol.
1, pp. 552- 555, May 2005.
[7] S. D- Amico, M. De Matteis and A. Baschirotto, "A 6.4mW,
4.9nV/Hz, 24dBm IIP3 VGA for a multi-standard (WLAN, UMTS,
GSM and Bluetooth) receiver", 32nd European Solid-State Circuits
Conference, pp. 82-85, September 2006.
[8] Ze Tao and S. Signell, "Multi-standard delta-sigma decimation filter
design", IEEE Asia Pacific Conference on Circuits and Systems
(APCCAS 2006), Singapore, pp. 1212-1215, Dec. 2006.
[9] M. Kim and S. Lee, "Design of dual-mode digital down converter for
WCDMA and cdma2000", ETRI Journal, Vol.26, No.6, pp.555-559,
Dec. 2004.
[10] F. Sheikh and S. Masud, "Efficient sample rate conversion for multistandard
software defined radios", IEEE Int. Conf. on Acoustics, Speech
and Signal Processing, HI, pp. II-329 - II-332, Apr. 2007.
[11] Andrea Xotta, Andrea Gerosa and Andrea Neviani, "A multi-mode ΣΔ
analog-to-digital converter for GSM, UMTS and WLAN," IEEE
International Symposium on Circuits and Systems, vol.3, pp. 2551-
2554, May 2005.
[12] Ling Zhang, Vinay Nadig and Mohammed Ismail, "A high order multibit
ΣΔ modulator for multi-standard wireless receiver", IEEE
International Midwest Symposium on Circuits and Systems, pp. III-379-
III-382, 2004.
[13] E.B. Hogenauer, "An economical class of digital filters for decimation
and interpolation", IEEE Transactions on Acoustic, Speech and Signal
Processing, Vol. ASSP-29, No. 2, Apr. 1981, pp. 155-162.
[14] U. Meyer-Baese, Digital signal processing with field programmable
gate arrays, Springer-verlag Berlin Heidelberg, New York, 2001.