Implementation of Channel Estimation and Timing Synchronization Algorithms for MIMO-OFDM System Using NI USRP 2920

MIMO-OFDM communication system presents a key solution for the next generation of mobile communication due to its high spectral efficiency, high data rate and robustness against multi-path fading channels. However, MIMO-OFDM system requires a perfect knowledge of the channel state information and a good synchronization between the transmitter and the receiver to achieve the expected performances. Recently, we have proposed two algorithms for channel estimation and timing synchronization with good performances and very low implementation complexity compared to those proposed in the literature. In order to validate and evaluate the efficiency of these algorithms in real environments, this paper presents in detail the implementation of 2 × 2 MIMO-OFDM system based on LabVIEW and USRP 2920. Implementation results show a good agreement with the simulation results under different configuration parameters.

Low-Complexity Channel Estimation Algorithm for MIMO-OFDM Systems

One of the main challenges in MIMO-OFDM system to achieve the expected performances in terms of data rate and robustness against multi-path fading channels is the channel estimation. Several methods were proposed in the literature based on either least square (LS) or minimum mean squared error (MMSE) estimators. These methods present high implementation complexity as they require the inversion of large matrices. In order to overcome this problem and to reduce the complexity, this paper presents a solution that benefits from the use of the STBC encoder and transforms the channel estimation process into a set of simple linear operations. The proposed method is evaluated via simulation in AWGN-Rayleigh fading channel. Simulation results show a maximum reduction of 6.85% of the bit error rate (BER) compared to the one obtained with the ideal case where the receiver has a perfect knowledge of the channel.

A Novel Digital Calibration Technique for Gain and Offset Mismatch in TIΣΔ ADCs

Time interleaved sigma-delta (TIΣΔ) architecture is a potential candidate for high bandwidth analog to digital converters (ADC) which remains a bottleneck for software and cognitive radio receivers. However, the performance of the TIΣΔ architecture is limited by the unavoidable gain and offset mismatches resulting from the manufacturing process. This paper presents a novel digital calibration method to compensate the gain and offset mismatch effect. The proposed method takes advantage of the reconstruction digital signal processing on each channel and requires only few logic components for implementation. The run time calibration is estimated to 10 and 15 clock cycles for offset cancellation and gain mismatch calibration respectively.