Abstract: A compact tunable 10 W picosecond source based on
Yb-doped fiber amplification of gain switch laser diode has been
demonstrated. A gain switch semiconductor laser diode was used as
the seed source, and a multi-stage single mode Yb-doped fiber
preamplifier was combined with two large mode area double-clad
Yb-doped fiber main amplifiers to construct the amplification system.
The tunable pulses with high stability and excellent beam quality
(M2
Abstract: This paper presents a novel approach for the design of
microwave circuits using Adaptive Network Fuzzy Inference
Optimizer (ANFIO). The method takes advantage of direct synthesis
of subsections of the amplifier using very fast and accurate ANFIO
models based on exact simulations using ADS. A mapping from
course space to fine space known as space mapping is also used. The
proposed synthesis approach takes into account the noise and
scattering parameters due to parasitic elements to achieve optimal
results. The overall ANFIO system is capable of designing different
LNAs at different noise and scattering criteria. This approach offers
significantly reduced time in the design of microwave amplifiers
within the validity range of the ANFIO system. The method has been
proven to work efficiently for a 2.4GHz LNA example. The S21 of
10.1 dB and noise figure (NF) of 2.7 dB achieved for ANFIO while
S21 of 9.05 dB and NF of 2.6 dB achieved for ANN.
Abstract: A 1.2 V, 0.61 mA bias current, low noise amplifier
(LNA) suitable for low-power applications in the 2.4 GHz band is
presented. Circuit has been implemented, laid out and simulated using
a UMC 130 nm RF-CMOS process. The amplifier provides a 13.3 dB
power gain a noise figure NF< 2.28 dB and a 1-dB compression point
of -15.69 dBm, while dissipating 0.74 mW. Such performance make
this design suitable for wireless sensor networks applications such as
ZigBee.
Abstract: This article proposes a current-mode square-rooting
circuit using current follower transconductance amplifier (CTFA).
The amplitude of the output current can be electronically controlled
via input bias current with wide input dynamic range. The proposed
circuit consists of only single CFTA. Without any matching
conditions and external passive elements, the circuit is then
appropriate for an IC architecture. The magnitude of the output signal
is temperature-insensitive. The PSpice simulation results are
depicted, and the given results agree well with the theoretical
anticipation. The power consumption is approximately 1.96mW at
±1.5V supply voltages.
Abstract: A fast settling multipath CMOS OTA for high speed
switched capacitor applications is presented here. With the basic
topology similar to folded-cascode, bandwidth and DC gain of the
OTA are enhanced by adding extra paths for signal from input to
output. Designed circuit is simulated with HSPICE using level 49
parameters (BSIM 3v3) in 0.35mm standard CMOS technology. DC
gain achieved is 56.7dB and Unity Gain Bandwidth (UGB) obtained
is 1.15GHz. These results confirm that adding extra paths for signal
can improve DC gain and UGB of folded-cascode significantly.
Abstract: This paper describes a low-power second-order filter
for a continuous-time chopper stabilized capacitive sensor interface,
integrated with a fully differential post-CMOS surface-micromachined
MEMS pressure sensor. The circuit uses a single-ended
folded-cascode operational amplifier and two GM-C filters connected
in cascade. The circuit is realized in a 0.18 μm CMOS process and
offers differential to single-ended conversion. The novelty of the
scheme is the cascade of two GM-C filters to achieve a second-order
filter while minimizing power dissipation. The simulated filter cutoff
frequency is 1.14 kHz at common-mode voltage 1.65 V,
operating from a 3.3 V supply while dissipating 172μW of power.
The filter achieves an operating range of 1V for an output load of
1MOhm and 10pF.
Abstract: Personnel protection devices are cardinal in safety hazard applications. They are widely used in home, office and in industry environments to reduce the risk of lethal shock to human being and equipment safety. This paper briefly reviews various personnel protection devices also describes the basic working principle of conventional ground fault circuit interrupter (GFCI) or ground fault isolator (GFI), its disadvantages and ways to overcome the disadvantages with solid-state relay (SSR) based GFI with ultrafast response up on fault implemented in printed circuit board. This solid state GFI comprises discrete MOSFET based alternating current (AC) switches, linear optical amplifier, photovoltaic isolator and sense resistor. In conventional GFI, current transformer is employed as a sensing element to detect the difference in current flow between live and neutral conductor. If there is no fault in equipment powered through GFI, due to insulation failure of internal wires and windings of motors, both live and neutral currents will be equal in magnitude and opposite in phase.
Abstract: In this paper, a system level behavioural model for RF
power amplifier, which exhibits memory effects, and based on multibranch
system is proposed. When higher order terms are included,
the memory polynomial model (MPM) exhibits numerical
instabilities. A set of memory orthogonal polynomial model
(OMPM) is introduced to alleviate the numerical instability problem
associated to MPM model. A data scaling and centring algorithm was
applied to improve the power amplifier modeling accuracy.
Simulation results prove that the numerical instability can be greatly
reduced, as well as the model precision improved with nonlinear
model.
Abstract: The increasing demand for higher data rates in wireless communication systems has led to the more effective and efficient use of all allocated frequency bands. In order to use the whole bandwidth at maximum efficiency, one needs to have RF power amplifiers with a higher linear level and memory-less performance. This is considered to be a major challenge to circuit designers. In this thesis the linearity and memory are studied and examined via the behavior of the intermodulation distortion (IMD). A major source of the in-band distortion can be shown to be influenced by the out-of-band impedances presented at either the input or the output of the device, especially those impedances terminated the low frequency (IF) components. Thus, in order to regulate the in-band distortion, the out of-band distortion must be controllable. These investigations are performed on a 12W LDMOS device characterised at 2.1 GHz within a purpose built, high-power measurement system.
Abstract: In this report, an OTA which is used in fully
differential pipelined ADC was described. Using gain-boost
architecture with difference-ended amplifier, this OTA achieve
high-gain and high-speed. Besides, the CMFB circuit is also used, and
some methods are concerned to improve the performance. Then, by
optimization the layout design, OTA-s mismatch was reduced. This
design was using TSMC 0.18um CMOS process and simulation both
schematic and layout in Cadence. The result of the simulation shows
that the OTA has a gain up to 80dB,a unity gain bandwidth of about
1.437GHz for a 2pF load, a slew rate is about 428V/μs, a output swing
is 0.2V~1.35V, with the power supply of 1.8V, the power
consumption is 88mW. This amplifier was used in a 10bit 150MHz
pipelined ADC.
Abstract: Wavelength multiplexing (WDM) technology along
with optical amplifiers is used for optical communication systems in
S-band, C-band and L-band. To improve the overall system
performance Hybrid amplifiers consisting of cascaded TDFA and
EDFA with different gain bandwidths are preferred for long haul
wavelength multiplexed optical communication systems. This paper
deals with statistical analysis of different configuration of hybrid
amplifier i.e. analysis of TDFA-EDFA configuration and EDFA –
TDFA configuration. In this paper One-Way ANOVA method is used
for statistical analysis.
Abstract: This paper proposed a new CAD tools for microwave amplifier design. The proposed tool is based on survey about the broadband amplifier design methods, such as the Feedback amplifiers, balanced amplifiers and Compensated Matching Network The proposed tool is developed for broadband amplifier using a compensated matching network "unconditional stability amplifier". The developed program is based on analytical procedures with ability of smith chart explanation. The C# software is used for the proposed tools implementation. The program is applied on broadband amplifier as an example for testing. The designed amplifier is considered as a broadband amplifier at the range 300-700 MHz. The results are highly agreement with the expected results. Finally, these methods can be extended for wide band amplifier design.
Abstract: A kind of behavior model for discrete sampling and hold amplifier with charge transmission is analyzed. The transfer function and behavior features are based on the main AC responses of operation amplifier. The result used in pipelined and sigma-delta ADC shows the exact of model of sampling and hold amplifier, and the non-ideal factors are taken into account.
Abstract: A precision CMOS chopping amplifier is adopted in this work to improve a CMOS temperature sensor high sensitive enough for intracranial temperature monitoring. An amplified temperature sensitivity of 18.8 ± 3*0.2 mV/oC is attained over the temperature range from 20 oC to 80 oC from a given 10 samples of the same wafer. The analog frontend design outputs the temperature dependent and the temperature independent signals which can be directly interfaced to a 10 bit ADC to accomplish an accurate temperature instrumentation system.
Abstract: An optimized design of E/O and O/E for access points
of WiMAX RoF was carried out by evaluating RCE. The use of the
DFB-LD, a low input-impedance driving, a low distortion PIN-PD,
and a high gain EPHEMT amplifier is promising the cost-effective
design. For the uplink RoF design, the use of EDFA and EP-HEMT
amplifiers is necessity.
Abstract: A digital system is proposed for low power 100-
channel neural recording system in this paper, which consists of 100
amplifiers, 100 analog-to-digital converters (ADC), digital controller
and baseband, transceiver for data link and RF command link. The
proposed system is designed in a 0.18 μm CMOS process and 65 nm
CMOS process.
Abstract: This paper presents a low-voltage low-power differential linear transconductor with near rail-to-rail input swing. Based on the current-mirror OTA topology, the proposed transconductor combines the Flipped Voltage Follower (FVF) technique to linearize the transconductor behavior that leads to class- AB linear operation and the virtual transistor technique to lower the effective threshold voltages of the transistors which offers an advantage in terms of low supply requirement. Design of the OTA has been discussed. It operates at supply voltages of about ±0.8V. Simulation results for 0.18μm TSMC CMOS technology show a good input range of 1Vpp with a high DC gain of 81.53dB and a total harmonic distortion of -40dB at 1MHz for an input of 1Vpp. The main aim of this paper is to present and compare new OTA design with high transconductance, which has a potential to be used in low voltage applications.
Abstract: In this paper we present an energy efficient match-line
(ML) sensing scheme for high-speed ternary content-addressable
memory (TCAM). The proposed scheme isolates the sensing unit of
the sense amplifier from the large and variable ML capacitance. It
employs feedback in the sense amplifier to successfully detect a
match while keeping the ML voltage swing low. This reduced voltage
swing results in large energy saving. Simulation performed using
130nm 1.2V CMOS logic shows at least 30% total energy saving in
our scheme compared to popular current race (CR) scheme for
similar search speed. In terms of speed, dynamic energy, peak power
consumption and transistor count our scheme also shows better
performance than mismatch-dependant (MD) power allocation
technique which also employs feedback in the sense amplifier.
Additionally, the implementation of our scheme is simpler than CR
or MD scheme because of absence of analog control voltage and
programmable delay circuit as have been used in those schemes.
Abstract: Multicarrier transmission system such as Orthogonal
Frequency Division Multiplexing (OFDM) is a promising technique
for high bit rate transmission in wireless communication system.
OFDM is a spectrally efficient modulation technique that can achieve
high speed data transmission over multipath fading channels without
the need for powerful equalization techniques. However the price
paid for this high spectral efficiency and less intensive equalization
is low power efficiency. OFDM signals are very sensitive to nonlinear
effects due to the high Peak-to-Average Power Ratio (PAPR),
which leads to the power inefficiency in the RF section of the
transmitter. This paper investigates the effect of PAPR reduction on
the performance parameter of multicarrier communication system.
Performance parameters considered are power consumption of Power
Amplifier (PA) and Digital-to-Analog Converter (DAC), power amplifier
efficiency, SNR of DAC and BER performance of the system.
From our analysis it is found that irrespective of PAPR reduction
technique being employed, the power consumption of PA and DAC
reduces and power amplifier efficiency increases due to reduction in
PAPR. Moreover, it has been shown that for a given BER performance
the requirement of Input-Backoff (IBO) reduces with reduction in
PAPR.