Abstract: In this paper we present an energy efficient match-line
(ML) sensing scheme for high-speed ternary content-addressable
memory (TCAM). The proposed scheme isolates the sensing unit of
the sense amplifier from the large and variable ML capacitance. It
employs feedback in the sense amplifier to successfully detect a
match while keeping the ML voltage swing low. This reduced voltage
swing results in large energy saving. Simulation performed using
130nm 1.2V CMOS logic shows at least 30% total energy saving in
our scheme compared to popular current race (CR) scheme for
similar search speed. In terms of speed, dynamic energy, peak power
consumption and transistor count our scheme also shows better
performance than mismatch-dependant (MD) power allocation
technique which also employs feedback in the sense amplifier.
Additionally, the implementation of our scheme is simpler than CR
or MD scheme because of absence of analog control voltage and
programmable delay circuit as have been used in those schemes.
Abstract: The effect of flooding can be a serious problem for
wheat farmers, even at dry land condition. Amount of flooding
damage depends on duration flooding, developmental stage, wheat
type and variety. Therefore as a factorial experiment in randomized
complete design based on winter bread wheat cultivars (Pishtaz,
Marvdasht, Shiraz, Zarin, Shahriar, C-81-4, Sardari, Agosta seed,
FGS and Azar2) at stages (Non- flooding stress, flooding at tillering
and stem elongation stages for 15 days) carried out in Faculty of
Agriculture, Razi University, Kermanshah, Iran. During flooding,
soil environment of plant roots were water saturated. Analysis of
variance showed that flooding had a significant effect on the number
of grains per spike, grain weight per spike and a grain weight. Hence
flooding reduces the number of grain per spike between 27.1 to 42.5
percent, grain weight per spike between 34.7 to 54.4 percent and
single grain weight between 12.1 to 15.1 percent. Effects of flooding
at the tillering stage reduced higher than stem elongation stage on
studied traits. The result also showed that flooding at tillering stage
delayed spikelet primordial and floret. Between wheat cultivars was
significant for traits, but were different reactions. "Shiraz", "Zarin"
and "Shahriar" had the most no. grain per spike, but "Zarin" and
"Sardari" had the most grain weight per spike and single grain
weight, respectively. Also, interaction between start of flooding and
cultivar was significant.
Abstract: We have fabricated a-IGZO TFT and investigated the
stability under positive DC and AC bias stress. The threshold voltage
of a-IGZO TFT shifts positively under those biases, and that reduces
on-current. For this reason, conventional shift-register circuit
employing TFTs which stressed by positive bias will be unstable, may
do not work properly. We have designed a new 6-transistor
shift-register, which has less transistors than prior circuits. The TFTs
of the proposed shift-register are not suffering from positive DC or AC
stress, mainly kept unbiased. Despite the compact design, the stable
output signal was verified through the SPICE simulation even under
RC delay of clock signal.
Abstract: Most of ignition delay correlations studies have been
developed in a constant volume bombs which cannot capture the
dynamic variation in pressure and temperature during the ignition
delay as in real engines. Watson, Assanis et. al. and Hardenberg
and Hase correlations have been developed based on experimental
data of diesel engines. However, they showed limited predictive
ability of ignition delay when compared to experimental results. The
objective of the study was to investigate the dependency of ignition
delay time on engine brake power. An experimental investigation of
the effect of automotive diesel and water diesel emulsion fuels on
ignition delay under steady state conditions of a direct injection diesel
engine was conducted. A four cylinder, direct injection naturally
aspirated diesel engine was used in this experiment over a wide range
of engine speeds and two engine loads. The ignition delay
experimental data were compared with predictions of Assanis et. al.
and Watson ignition delay correlations. The results of the
experimental investigation were then used to develop a new ignition
delay correlation. The newly developed ignition delay correlation has
shown a better agreement with the experimental data than Assanis et.
al. and Watson when using automotive diesel and water diesel
emulsion fuels especially at low to medium engine speeds at both
loads. In addition, the second derivative of cylinder pressure which is
the most widely used method in determining the start of combustion
was investigated.
Abstract: In this paper, we propose a robust controller design method for discrete-time systems with sector-bounded nonlinearities and time-varying delay. Based on the Lyapunov theory, delaydependent stabilization criteria are obtained in terms of linear matrix inequalities (LMIs) by constructing the new Lyapunov-Krasovskii functional and using some inequalities. A robust state feedback controller is designed by LMI framework and a reciprocally convex combination technique. The effectiveness of the proposed method is verified throughout a numerical example.
Abstract: In this work, we successfully extended one-dimensional differential transform method (DTM), by presenting and proving some theorems, to solving nonlinear high-order multi-pantograph equations. This technique provides a sequence of functions which converges to the exact solution of the problem. Some examples are given to demonstrate the validity and applicability of the present method and a comparison is made with existing results.
Abstract: In this paper, by using Mawhin-s continuation theorem of coincidence degree and a method based on delay differential inequality, some sufficient conditions are obtained for the existence and global exponential stability of periodic solutions of cellular neural networks with distributed delays and impulses on time scales. The results of this paper generalized previously known results.
Abstract: QoS Routing aims to find paths between senders and
receivers satisfying the QoS requirements of the application which
efficiently using the network resources and underlying routing
algorithm to be able to find low-cost paths that satisfy given QoS
constraints. The problem of finding least-cost routing is known to be
NP-hard or complete and some algorithms have been proposed to
find a near optimal solution. But these heuristics or algorithms either
impose relationships among the link metrics to reduce the complexity
of the problem which may limit the general applicability of the
heuristic, or are too costly in terms of execution time to be applicable
to large networks. In this paper, we concentrate an algorithm that
finds a near-optimal solution fast and we named this algorithm as
optimized Delay Constrained Routing (ODCR), which uses an
adaptive path weight function together with an additional constraint
imposed on the path cost, to restrict search space and hence ODCR
finds near optimal solution in much quicker time.
Abstract: Multiplication algorithms have considerable effect on
processors performance. A new high-speed, low-power
multiplication algorithm has been presented using modified Dadda
tree structure. Three important modifications have been implemented
in inner product generation step, inner product reduction step and
final addition step. Optimized algorithms have to be used into basic
computation components, such as multiplication algorithms. In this
paper, we proposed a new algorithm to reduce power, delay, and
transistor count of a multiplication algorithm implemented using low
power modified counter. This work presents a novel design for
Dadda multiplication algorithms. The proposed multiplication
algorithm includes structured parts, which have important effect on
inner product reduction tree. In this paper, a 1.3V, 64-bit carry hybrid
adder is presented for fast, low voltage applications. The new 64-bit
adder uses a new circuit to implement the proposed carry hybrid
adder. The new adder using 80 nm CMOS technology has been
implemented on 700 MHz clock frequency. The proposed
multiplication algorithm has achieved 14 percent improvement in
transistor count, 13 percent reduction in delay and 12 percent
modification in power consumption in compared with conventional
designs.
Abstract: Water pipe network is installed underground and once equipped, it is difficult to recognize the state of pipes when the leak or burst happens. Accordingly, post management is often delayed
after the fault occurs. Therefore, the systematic fault management system of water pipe network is required to prevent the accident and
minimize the loss. In this work, we develop online fault detection system of water pipe network using data of pipes such as flow rate
or pressure. The transient model describing water flow in pipelines
is presented and simulated using MATLAB. The fault situations such
as the leak or burst can be also simulated and flow rate or pressure data when the fault happens are collected. Faults are detected using
statistical methods of fast Fourier transform and discrete wavelet transform, and they are compared to find which method shows the
better fault detection performance.
Abstract: In this paper, we establish several oscillation criteria for the nonlinear second-order damped delay dynamic equation r(t)|xΔ(t)|β-1xΔ(t)Δ + p(t)|xΔσ(t)|β-1xΔσ(t) + q(t)f(x(τ (t))) = 0 on an arbitrary time scale T, where β > 0 is a constant. Our results generalize and improve some known results in which β > 0 is a quotient of odd positive integers. Some examples are given to illustrate our main results.
Abstract: Truncated multiplier is a good candidate for digital
signal processing (DSP) applications including finite impulse
response (FIR) and discrete cosine transform (DCT). Through
truncated multiplier a significant reduction in Field Programmable
Gate Array (FPGA) resources can be achieved. This paper presents
for the first time a comparison of resource utilization of Spartan-3AN
and Virtex-5 implementation of standard and truncated multipliers
using Very High Speed Integrated Circuit Hardware Description
Language (VHDL). The Virtex-5 FPGA shows significant
improvement as compared to Spartan-3AN FPGA device. The
Virtex-5 FPGA device shows better performance with a percentage
ratio of number of occupied slices for standard to truncated
multipliers is increased from 40% to 73.86% as compared to Spartan-
3AN is decreased from 68.75% to 58.78%. Results show that the
anomaly in Spartan-3AN FPGA device average connection and
maximum pin delay have been efficiently reduced in Virtex-5 FPGA
device.
Abstract: In this paper the Analytic Network Process (ANP) is
applied to the selection of photovoltaic (PV) solar power projects.
These projects follow a long management and execution process
from plant site selection to plant start-up. As a consequence, there are
many risks of time delays and even of project stoppage.
In the case study presented in this paper a top manager of an
important Spanish company that operates in the power market has to
decide on the best PV project (from four alternative projects) to
invest based on risk minimization. The manager identified 50 project
execution delay and/or stoppage risks.
The influences among elements of the network (groups of risks
and alternatives) were identified and analyzed using the ANP
multicriteria decision analysis method. After analyzing the results the
main conclusion is that the network model can manage all the
information of the real-world problem and thus it is a decision
analysis model recommended by the authors. The strengths and
weaknesses ANP as a multicriteria decision analysis tool are also
described in the paper.
Abstract: In this paper, a predator-prey model with time delay and habitat complexity is investigated. By analyzing the characteristic equations, the local stability of each feasible equilibria of the system is discussed and the existence of a Hopf bifurcation at the coexistence equilibrium is established. By choosing the sum of two delays as a bifurcation parameter, we show that Hopf bifurcations can occur as crosses some critical values. By deriving the equation describing the flow on the center manifold, we can determine the direction of the Hopf bifurcations and the stability of the bifurcating periodic solutions. Numerical simulations are carried out to illustrate the main theoretical results.
Abstract: In this paper we propose an intelligent agent approach
to control the electric power grid at a smaller granularity in order to
give it self-healing capabilities. We develop a method using the
influence model to transform transmission substations into
information processing, analyzing and decision making (intelligent
behavior) units. We also develop a wireless communication method
to deliver real-time uncorrupted information to an intelligent
controller in a power system environment. A combined networking
and information theoretic approach is adopted in meeting both the
delay and error probability requirements. We use a mobile agent
approach in optimizing the achievable information rate vector and in
the distribution of rates to users (sensors). We developed the concept
and the quantitative tools require in the creation of cooperating semiautonomous
subsystems which puts the electric grid on the path
towards intelligent and self-healing system.
Abstract: The objective of this paper is to present explicit analytical formulas for evaluating important characteristics of Double Moving Average control chart (DMA) for Poisson distribution. The most popular characteristics of a control chart are Average Run Length ( 0 ARL ) - the mean of observations that are taken before a system is signaled to be out-of control when it is actually still incontrol, and Average Delay time ( 1 ARL ) - mean delay of true alarm times. An important property required of 0 ARL is that it should be sufficiently large when the process is in-control to reduce a number of false alarms. On the other side, if the process is actually out-ofcontrol then 1 ARL should be as small as possible. In particular, the explicit analytical formulas for evaluating 0 ARL and 1 ARL be able to get a set of optimal parameters which depend on a width of the moving average ( w ) and width of control limit ( H ) for designing DMA chart with minimum of 1 ARL
Abstract: CloudSim is a useful tool to simulate the cloud
environment. It shows the service availability, the power consumption,
and the network traffic of services on the cloud environment.
Moreover, it supports to calculate a network communication delay
through a network topology data easily. CloudSim allows inputting a
file of topology data, but it does not provide any generating process.
Thus, it needs the file of topology data generated from some other
tools. The BRITE is typical network topology generator. Also, it
supports various type of topology generating algorithms. If CloudSim
can include the BRITE, network simulation for clouds is easier than
existing version. This paper shows the potential of connection between
BRITE and CloudSim. Also, it proposes the direction to link between
them.
Abstract: To support mobility in ATM networks, a number of
technical challenges need to be resolved. The impact of handoff
schemes in terms of service disruption, handoff latency, cost
implications and excess resources required during handoffs needs to
be addressed. In this paper, a one phase handoff and route
optimization solution using reserved PVCs between adjacent ATM
switches to reroute connections during inter-switch handoff is
studied. In the second phase, a distributed optimization process is
initiated to optimally reroute handoff connections. The main
objective is to find the optimal operating point at which to perform
optimization subject to cost constraint with the purpose of reducing
blocking probability of inter-switch handoff calls for delay tolerant
traffic. We examine the relation between the required bandwidth
resources and optimization rate. Also we calculate and study the
handoff blocking probability due to lack of bandwidth for resources
reserved to facilitate the rapid rerouting.
Abstract: We present an explicit expression to estimate driving voltage attenuation through RC networks representation of an ultrahigh- speed image sensor. Elmore delay metric for a fundamental RC chain is employed as the first-order approximation. By application of dimensional analysis to SPICE simulation data, we found a simple expression that significantly improves the accuracy of the approximation. Estimation error of the resultant expression for uniform RC networks is less than 2%. Similarly, another simple closed-form model to estimate 50 % delay through fundamental RC networks is also derived with sufficient accuracy. The framework of this analysis can be extended to address delay or attenuation issues of other VLSI structures.
Abstract: In diversity rich environments, such as in Ultra-
Wideband (UWB) applications, the a priori determination of the
number of strong diversity branches is difficult, because of the considerably large number of diversity paths, which are characterized
by a variety of power delay profiles (PDPs). Several
Rake implementations have been proposed in the past, in order to reduce the number of the estimated and combined paths. To this
aim, we introduce two adaptive Rake receivers, which combine
a subset of the resolvable paths considering simultaneously the
quality of both the total combining output signal-to-noise ratio (SNR) and the individual SNR of each path. These schemes achieve
better adaptation to channel conditions compared to other known receivers, without further increasing the complexity. Their performance
is evaluated in different practical UWB channels, whose models are based on extensive propagation measurements. The
proposed receivers compromise between the power consumption,
complexity and performance gain for the additional paths, resulting in important savings in power and computational resources.