Abstract: This article proposes a voltage-mode
multifunction filter using differential voltage current
controllable current conveyor transconductance amplifier
(DV-CCCCTA). The features of the circuit are that: the
quality factor and pole frequency can be tuned independently
via the values of capacitors: the circuit description is very
simple, consisting of merely 1 DV-CCCCTA, and 2
capacitors. Without any component matching conditions, the
proposed circuit is very appropriate to further develop into
an integrated circuit. Additionally, each function response
can be selected by suitably selecting input signals with
digital method. The PSpice simulation results are depicted.
The given results agree well with the theoretical anticipation.
Abstract: This article presents a resistorless current-mode firstorder allpass filter based on second generation current controlled current conveyors (CCCIIs). The features of the circuit are that: the pole frequency can be electronically controlled via the input bias current: the circuit description is very simple, consisting of 2 CCCIIs and single grounded capacitor, without any external resistors and component matching requirements. Consequently, the proposed circuit is very appropriate to further develop into an integrated circuit. Low input and high output impedances of the proposed configuration enable the circuit to be cascaded in current-mode without additional current buffers. The PSpice simulation results are depicted. The given results agree well with the theoretical anticipation. The application example as a current-mode quadrature oscillator is included.
Abstract: In this project, a tele-operated anthropomorphic
robotic arm and hand is designed and built as a versatile robotic arm
system. The robot has the ability to manipulate objects such as pick
and place operations. It is also able to function by itself, in
standalone mode.
Firstly, the robotic arm is built in order to interface with a personal
computer via a serial servo controller circuit board. The circuit board
enables user to completely control the robotic arm and moreover,
enables feedbacks from user. The control circuit board uses a
powerful integrated microcontroller, a PIC (Programmable Interface
Controller). The PIC is firstly programmed using BASIC (Beginner-s
All-purpose Symbolic Instruction Code) and it is used as the 'brain'
of the robot. In addition a user friendly Graphical User Interface
(GUI) is developed as the serial servo interface software using
Microsoft-s Visual Basic 6.
The second part of the project is to use speech recognition control
on the robotic arm. A speech recognition circuit board is constructed
with onboard components such as PIC and other integrated circuits. It
replaces the computers- Graphical User Interface. The robotic arm is
able to receive instructions as spoken commands through a
microphone and perform operations with respect to the commands
such as picking and placing operations.
Abstract: Distributed Computing Systems are usually considered the most suitable model for practical solutions of many parallel algorithms. In this paper an enhanced distributed system is presented to improve the time complexity of Binary Indexed Trees (BIT). The proposed system uses multi-uniform processors with identical architectures and a specially designed distributed memory system. The analysis of this system has shown that it has reduced the time complexity of the read query to O(Log(Log(N))), and the update query to constant complexity, while the naive solution has a time complexity of O(Log(N)) for both queries. The system was implemented and simulated using VHDL and Verilog Hardware Description Languages, with xilinx ISE 10.1, as the development environment and ModelSim 6.1c, similarly as the simulation tool. The simulation has shown that the overhead resulting by the wiring and communication between the system fragments could be fairly neglected, which makes it applicable to practically reach the maximum speed up offered by the proposed model.
Abstract: A 10bit, 40 MSps, sample and hold, implemented in 0.18-μm CMOS technology with 3.3V supply, is presented for application in the front-end stage of an analog-to-digital converter. Topology selection, biasing, compensation and common mode feedback are discussed. Cascode technique has been used to increase the dc gain. The proposed opamp provides 149MHz unity-gain bandwidth (wu), 80 degree phase margin and a differential peak to peak output swing more than 2.5v. The circuit has 55db Total Harmonic Distortion (THD), using the improved fully differential two stage operational amplifier of 91.7dB gain. The power dissipation of the designed sample and hold is 4.7mw. The designed system demonstrates relatively suitable response in different process, temperature and supply corners (PVT corners).
Abstract: This paper presents a new circuit arrangement for a
current-mode Wheatstone bridge that is suitable for low-voltage
integrated circuits implementation. Compared to the other proposed
circuits, this circuit features severe reduction of the elements number,
low supply voltage (1V) and low power consumption (
Abstract: Electrical resistivity is a fundamental parameter of metals or electrical conductors. Since resistivity is a function of temperature, in order to completely understand the behavior of metals, a temperature dependent theoretical model is needed. A model based on physics principles has recently been developed to obtain an equation that relates electrical resistivity to temperature. This equation is dependent upon a parameter associated with the electron travel time before being scattered, and a parameter that relates the energy of the atoms and their separation distance. Analysis of the energy parameter reveals that the equation is optimized if the proportionality term in the equation is not constant but varies over the temperature range. Additional analysis reveals that the theoretical equation can be used to determine the mean free path of conduction electrons, the number of defects in the atomic lattice, and the ‘equivalent’ charge associated with the metallic bonding of the atoms. All of this analysis provides validation for the theoretical model and provides insight into the behavior of metals where performance is affected by temperatures (e.g., integrated circuits and temperature sensors).
Abstract: The realization of current-mode quadrature oscillators
using current controlled current conveyor transconductance
amplifiers (CCCCTAs) and grounded capacitors is presented. The
proposed oscillators can provide 2 sinusoidal output currents with 90º
phase difference. It is enabled non-interactive dual-current control for
both the condition of oscillation and the frequency of oscillation.
High output impedances of the configurations enable the circuit to be
cascaded without additional current buffers. The use of only
grounded capacitors is ideal for integration. The circuit performances
are depicted through PSpice simulations, they show good agreement
to theoretical anticipation.
Abstract: Timing driven physical design, synthesis, and
optimization tools need efficient closed-form delay models for
estimating the delay associated with each net in an integrated circuit
(IC) design. The total number of nets in a modern IC design has
increased dramatically and exceeded millions. Therefore efficient
modeling of interconnection is needed for high speed IC-s. This
paper presents closed–form expressions for RC and RLC
interconnection trees in current mode signaling, which can be
implemented in VLSI design tool. These analytical model
expressions can be used for accurate calculation of delay after the
design clock tree has been laid out and the design is fully routed.
Evaluation of these analytical models is several orders of magnitude
faster than simulation using SPICE.
Abstract: This article presents new current-mode oscillator circuits using CDTAs which is designed from block diagram. The proposed circuits consist of two CDTAs and two grounded capacitors. The condition of oscillation and the frequency of oscillation can be adjusted by electronic method. The circuits have high output impedance and use only grounded capacitors without any external resistor which is very appropriate to future development into an integrated circuit. The results of PSPICE simulation program are corresponding to the theoretical analysis.
Abstract: Quality of 2D and 3D cross-sectional images produce
by Computed Tomography primarily depend upon the degree of
precision of primary and secondary X-Ray intensity detection.
Traditional method of primary intensity detection is apt to errors.
Recently the X-Ray intensity measurement system along with smart
X-Ray sensors is developed by our group which is able to detect
primary X-Ray intensity unerringly. In this study a new smart X-Ray
sensor is developed using Light-to-Frequency converter TSL230
from Texas Instruments which has numerous advantages in terms of
noiseless data acquisition and transmission. TSL230 construction is
based on a silicon photodiode which converts incoming X-Ray
radiation into the proportional current signal. A current to frequency
converter is attached to this photodiode on a single monolithic CMOS
integrated circuit which provides proportional frequency count to
incoming current signal in the form of the pulse train. The frequency
count is delivered to the center of PICDEM FS USB board with
PIC18F4550 microcontroller mounted on it. With highly compact
electronic hardware, this Demo Board efficiently read the smart
sensor output data. The frequency output approaches overcome
nonlinear behavior of sensors with analog output thus un-attenuated
X-Ray intensities could be measured precisely and better
normalization could be acquired in order to attain high resolution.
Abstract: An efficient architecture for low jitter All Digital
Phase Locked Loop (ADPLL) suitable for high speed SoC
applications is presented in this paper. The ADPLL is designed using
standard cells and described by Hardware Description Language
(HDL). The ADPLL implemented in a 90 nm CMOS process can
operate from 10 to 200 MHz and achieve worst case frequency
acquisition in 14 reference clock cycles. The simulation result shows
that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps
at 100MHz. Since the digitally controlled oscillator (DCO) can
achieve both high resolution and wide frequency range, it can meet
the demands of system-level integration. The proposed ADPLL can
easily be ported to different processes in a short time. Thus, it can
reduce the design time and design complexity of the ADPLL, making
it very suitable for System-on-Chip (SoC) applications.
Abstract: This article presents a current-mode quadrature
oscillator using differential different current conveyor (DDCC) and
voltage differencing transconductance amplifier (VDTA) as active
elements. The proposed circuit is realized fro m a non-inverting
lossless integrator and an inverting second order low-pass filter. The
oscillation condition and oscillation frequency can be
electronically/orthogonally controlled via input bias currents. The
circuit description is very simple, consisting of merely 1 DDCC, 1
VDTA, 1 grounded resistor and 3 grounded capacitors. Using only
grounded elements, the proposed circuit is then suitable for IC
architecture. The proposed oscillator has high output impedance
which is easy to cascade or dive the external load without the buffer
devices. The PSPICE simulation results are depicted, and the given
results agree well with the theoretical anticipation. The power
consumption is approximately 1.76mW at ±1.25V supply voltages.
Abstract: Versatile dual-mode class-AB CMOS four-quadrant
analog multiplier circuit is presented. The dual translinear loops and
current mirrors are the basic building blocks in realization scheme.
This technique provides; wide dynamic range, wide-bandwidth response
and low power consumption. The major advantages of this
approach are; its has single ended inputs; since its input is dual translinear
loop operate in class-AB mode which make this multiplier
configuration interesting for low-power applications; current multiplying,
voltage multiplying, or current and voltage multiplying can
be obtainable with balanced input. The simulation results of versatile
analog multiplier demonstrate a linearity error of 1.2 %, a -3dB bandwidth
of about 19MHz, a maximum power consumption of 0.46mW,
and temperature compensated. Operation of versatile analog multiplier
was also confirmed through an experiment using CMOS transistor
array.
Abstract: This article presents a voltage-mode universal
biquadratic filter performing simultaneous 3 standard functions: lowpass,
high-pass and band-pass functions, employing differential
different current conveyor (DDCC) and current controlled current
conveyor (CCCII) as active element. The features of the circuit are
that: the quality factor and pole frequency can be tuned independently
via the input bias currents: the circuit description is very simple,
consisting of 1 DDCC, 2 CCCIIs, 2 electronic resistors and 2
grounded capacitors. Without requiring component matching
conditions, the proposed circuit is very appropriate to further develop
into an integrated circuit. The PSPICE simulation results are
depicted. The given results agree well with the theoretical
anticipation.