Abstract: A 10bit, 40 MSps, sample and hold, implemented in 0.18-μm CMOS technology with 3.3V supply, is presented for application in the front-end stage of an analog-to-digital converter. Topology selection, biasing, compensation and common mode feedback are discussed. Cascode technique has been used to increase the dc gain. The proposed opamp provides 149MHz unity-gain bandwidth (wu), 80 degree phase margin and a differential peak to peak output swing more than 2.5v. The circuit has 55db Total Harmonic Distortion (THD), using the improved fully differential two stage operational amplifier of 91.7dB gain. The power dissipation of the designed sample and hold is 4.7mw. The designed system demonstrates relatively suitable response in different process, temperature and supply corners (PVT corners).
Abstract: A 2.4GHz (RF) down conversion Gilbert Cell mixer,
implemented in a 0.18-μm CMOS technology with a 1.8V supply, is
presented. Current bleeding (charge injection) technique has been
used to increase the conversion gain and the linearity of the mixer.
The proposed mixer provides 10.75 dB conversion gain ( C G ) with
14.3mw total power consumption. The IIP3 and 1-dB compression
point of the mixer are 8dbm and -4.6dbm respectively, at 300 MHz
IF frequencies. Comparing the current design against the
conventional mixer design, demonstrates better performance in the
conversion gain, linearity, noise figure and port-to-port isolation.