Abstract: This paper presents a method of reducing the feedback
delay time of DWA(Data Weighted Averaging) used in sigma-delta
modulators. The delay time reduction results from the elimination of
the latch at the quantizer output and also from the falling edge
operation. The designed sigma-delta modulator improves the timing
margin about 16%. The sub-circuits of sigma-delta modulator such as
SC(Switched Capacitor) integrator, 9-level quantizer, comparator, and
DWA are designed with the non-ideal characteristics taken into
account. The sigma-delta modulator has a maximum SNR (Signal to
Noise Ratio) of 84 dB or 13 bit resolution.
Abstract: Implemented 5-bit 125-MS/s successive
approximation register (SAR) analog to digital converter (ADC) on
FPGA is presented in this paper.The design and modeling of a high
performance SAR analog to digital converter are based on monotonic
capacitor switching procedure algorithm .Spartan 3 FPGA is chosen
for implementing SAR analog to digital converter algorithm. SAR
VHDL program writes in Xilinx and modelsim uses for showing
results.
Abstract: In this paper, half bridge DC-DC converters with
transformer isolation presented in the literature are analyzed for highcurrent
and low-voltage applications under the same operation
conditions, and compared in terms of losses and efficiency. The
conventional and improved half-bridge DC-DC converters are
simulated, and current and voltage waveforms are obtained for input
voltage Vdc=500V, output current IO=450A, output voltage VO=38V
and switching frequency fS=20kHz. IGBTs are used as power
semiconductor switches. The power losses of the semiconductor
devices are calculated from current and voltage waveforms. From
simulation results, it is seen that the capacitor switched half bridge
converter has the best efficiency value, and can be preferred at high
power and high frequency applications.
Abstract: In this paper a novel method for finding the fault zone
on a Thyristor Controlled Series Capacitor (TCSC) incorporated
transmission line is presented. The method makes use of the Support
Vector Machine (SVM), used in the classification mode to
distinguish between the zones, before or after the TCSC. The use of
Discrete Wavelet Transform is made to prepare the features which
would be given as the input to the SVM. This method was tested on a
400 kV, 50 Hz, 300 Km transmission line and the results were highly
accurate.
Abstract: A novel three-phase active power filter (APF) circuit with photovoltaic (PV) system to improve the quality of service and to reduce the capacity of energy storage capacitor is presented. The energy balance concept and sampling technique were used to simplify the calculation algorithm for the required utility source current and to control the voltage of the energy storage capacitor. The feasibility was verified by using the Pspice simulations and experiments. When the APF mode was used during non-operational period, not only the utilization rate, power factor and power quality could be improved, but also the capacity of energy storage capacitor could sparing. As the results, the advantages of the APF circuit are simplicity of control circuits, low cost, and good transient response.
Abstract: Scalability poses a severe threat to the existing
DRAM technology. The capacitors that are used for storing and
sensing charge in DRAM are generally not scaled beyond 42nm.
This is because; the capacitors must be sufficiently large for reliable
sensing and charge storage mechanism. This leaves DRAM memory
scaling in jeopardy, as charge sensing and storage mechanisms
become extremely difficult. In this paper we provide an overview of
the potential and the possibilities of using Phase Change Memory
(PCM) as an alternative for the existing DRAM technology. The
main challenges that we encounter in using PCM are, the limited
endurance, high access latencies, and higher dynamic energy
consumption than that of the conventional DRAM. We then provide
an overview of various methods, which can be employed to
overcome these drawbacks. Hybrid memories involving both PCM
and DRAM can be used, to achieve good tradeoffs in access latency
and storage density. We conclude by presenting, the results of these
methods that makes PCM a potential replacement for the current
DRAM technology.
Abstract: This paper presents a genetic algorithm based
approach for solving security constrained optimal power flow
problem (SCOPF) including FACTS devices. The optimal location of
FACTS devices are identified using an index called overload index
and the optimal values are obtained using an enhanced genetic
algorithm. The optimal allocation by the proposed method optimizes
the investment, taking into account its effects on security in terms of
the alleviation of line overloads. The proposed approach has been
tested on IEEE-30 bus system to show the effectiveness of the
proposed algorithm for solving the SCOPF problem.
Abstract: Pipeline ADCs are becoming popular at high speeds
and with high resolution. This paper discusses the options of number
of bits/stage conversion techniques in pipelined ADCs and their
effect on Area, Speed, Power Dissipation and Linearity. The basic
building blocks like op-amp, Sample and Hold Circuit, sub converter,
DAC, Residue Amplifier used in every stage is assumed to be
identical. The sub converters use flash architectures. The design is
implemented using 0.18
Abstract: This paper present an efficient and reliable technique of optimization which combined fuel cost economic optimization and emission dispatch using the Sigmoid Decreasing Inertia Weight Particle Swarm Optimization algorithm (PSO) to reduce the cost of fuel and pollutants resulting from fuel combustion by keeping the output of generators, bus voltages, shunt capacitors and transformer tap settings within the security boundary. The performance of the proposed algorithm has been demonstrated on IEEE 30-bus system with six generating units. The results clearly show that the proposed algorithm gives better and faster speed convergence then linearly decreasing inertia weight.
Abstract: This article presents a current-mode universal biquadratic filter. The proposed circuit can apparently provide standard functions of the biquad filter: low-pass, high-pass, bandpass, band-reject and all-pass functions. The circuit uses 4 current controlled transconductance amplifiers (CCTAs) and 2 grounded capacitors. In addition, the pole frequency and quality factor can be adjusted by electronic method by adjusting the bias currents of the CCTA. The proposed circuit uses only grounded capacitors without additional external resistors, the proposed circuit is considerably appropriate to further developing into an integrated circuit. The results of PSPICE simulation program are corresponding to the theoretical analysis.
Abstract: This paper proposes two types of non-isolated
direct AC-DC converters. First, it shows a buck-boost
converter with an H-bridge, which requires few components
(three switches, two diodes, one inductor and one capacitor) to
convert AC input to DC output directly. This circuit can handle
a wide range of output voltage. Second, a direct AC-DC buck
converter is proposed for lower output voltage applications.
This circuit is analyzed with output voltage of 12V. We
describe circuit topologies, operation principles and simulation
results for both circuits.
Abstract: We succeeded to produce a high performance and flexible graphene/Manganese dioxide (G/MnO2) electrode coated on flexible polyethylene terephthalate (PET) substrate. The graphene film is initially synthesized by drop-casting the graphene oxide (GO) solution on the PET substrate, followed by simultaneous reduction and patterning of the dried film using carbon dioxide (CO2) laser beam with power of 1.8 W. Potentiostatic Anodic Deposition method was used to deposit thin film of MnO2 with different loading mass 10 – 50 and 100 μg.cm-2 on the pre-prepared graphene film. The electrodes were fully characterized in terms of structure, morphology, and electrochemical performance. A maximum specific capacitance of 973 F.g-1 was attributed when depositing 50μg.cm-2 MnO2 on the laser reduced graphene oxide rGO (or G/50MnO2) and over 92% of its initial capacitance was retained after 1000 cycles. The good electrochemical performance and long-term cycling stability make our proposed approach a promising candidate in the supercapacitor applications.
Abstract: A new current-mode multifunction filter using minimum number of passive elements is proposed. The proposed filter has single-input and four high-impedance outputs. It uses four passive elements (two capacitors and two resistors) and four dual output second generation current conveyors. Each output provides a different filter response, namely, low-pass, high-pass, band-pass and band-reject. The sensitivity analysis is also carried out on both ideal and non-ideal filter configurations. The validity of the proposed filter is verified through PSPICE simulations.
Abstract: Electrical distribution systems are incurring large losses as the loads are wide spread, inadequate reactive power compensation facilities and their improper control. A comprehensive static VAR compensator consisting of capacitor bank in five binary sequential steps in conjunction with a thyristor controlled reactor of smallest step size is employed in the investigative work. The work deals with the performance evaluation through analytical studies and practical implementation on an existing system. A fast acting error adaptive controller is developed suitable both for contactor and thyristor switched capacitors. The switching operations achieved are transient free, practically no need to provide inrush current limiting reactors, TCR size minimum providing small percentages of nontriplen harmonics, facilitates stepless variation of reactive power depending on load requirement so as maintain power factor near unity always. It is elegant, closed loop microcontroller system having the features of self regulation in adaptive mode for automatic adjustment. It is successfully tested on a distribution transformer of three phase 50 Hz, Dy11, 11KV/440V, 125 KVA capacity and the functional feasibility and technical soundness are established. The controller developed is new, adaptable to both LT & HT systems and practically established to be giving reliable performance.
Abstract: Properly sized capacitor banks are connected across induction motors for several reasons including power factor correction, reducing distortions, increasing capacity, etc. Total harmonic distortion (THD) and power factor (PF) are used in such cases to quantify the improvements obtained through connection of the external capacitor banks. On the other hand, one of the methods for assessing the motor internal condition is by the use of Park-s pattern analysis. In spite of taking adequate precautionary measures, the capacitor banks may sometimes malfunction. Such a minor fault in the capacitor bank is often not apparently discernible. This may however, give rise to substantial degradation of power factor correction performance and may also damage the supply profile. The case is more severe with the fact that the Park-s pattern gets distorted due to such external capacitor faults, and can give anomalous results about motor internal fault analyses. The aim of this paper is to present simulation and hardware laboratory test results to have an understanding of the anomalies in harmonic distortion and Park-s pattern analyses in induction motors due to capacitor bank defects.
Abstract: Optimal capacitor allocation in distribution systems
has been studied for a long times. It is an optimization problem
which has an objective to define the optimal sizes and locations of
capacitors to be installed. In this works, an overview of capacitor
placement problem in distribution systems is briefly introduced. The
objective functions and constraints of the problem are listed and the
methodologies for solving the problem are summarized.
Abstract: This article proposes a voltage-mode
multifunction filter using differential voltage current
controllable current conveyor transconductance amplifier
(DV-CCCCTA). The features of the circuit are that: the
quality factor and pole frequency can be tuned independently
via the values of capacitors: the circuit description is very
simple, consisting of merely 1 DV-CCCCTA, and 2
capacitors. Without any component matching conditions, the
proposed circuit is very appropriate to further develop into
an integrated circuit. Additionally, each function response
can be selected by suitably selecting input signals with
digital method. The PSpice simulation results are depicted.
The given results agree well with the theoretical anticipation.
Abstract: An implementation of current-mode multiphase sinusoidal oscillators is presented. Using CFTA-based lossy integrators, odd and odd/even phase systems can be realized with following advantages. The condition of oscillation and frequency of oscillation can be orthogonally tuned. The high output impedances facilitate easy driving an external load without additional current buffers. The proposed MSOs provide odd or even phase signals that are equally spaced in phase and equal amplitude. The circuit requires one CFTA, one resistor and one grounded capacitor per phase without additional current amplifier. The results of PSPICE simulations using CMOS CFTA are included to verify theory.
Abstract: This article presents a resistorless current-mode firstorder allpass filter based on second generation current controlled current conveyors (CCCIIs). The features of the circuit are that: the pole frequency can be electronically controlled via the input bias current: the circuit description is very simple, consisting of 2 CCCIIs and single grounded capacitor, without any external resistors and component matching requirements. Consequently, the proposed circuit is very appropriate to further develop into an integrated circuit. Low input and high output impedances of the proposed configuration enable the circuit to be cascaded in current-mode without additional current buffers. The PSpice simulation results are depicted. The given results agree well with the theoretical anticipation. The application example as a current-mode quadrature oscillator is included.
Abstract: Active Power Filters (APFs) are today the most
widely used systems to eliminate harmonics compensate power
factor and correct unbalanced problems in industrial power plants.
We propose to improve the performances of conventional APFs by
using artificial neural networks (ANNs) for harmonics estimation.
This new method combines both the strategies for extracting the
three-phase reference currents for active power filters and DC link
voltage control method. The ANNs learning capabilities to
adaptively choose the power system parameters for both to compute
the reference currents and to recharge the capacitor value requested
by VDC voltage in order to ensure suitable transit of powers to
supply the inverter. To investigate the performance of this
identification method, the study has been accomplished using
simulation with the MATLAB Simulink Power System Toolbox. The
simulation study results of the new (SAPF) identification technique
compared to other similar methods are found quite satisfactory by
assuring good filtering characteristics and high system stability.