Three-Phase High Frequency AC Conversion Circuit with Dual Mode PWM/PDM Control Strategy for High Power IH Applications

This paper presents a novel three-phase utility frequency to high frequency soft switching power conversion circuit with dual mode pulse width modulation and pulse density modulation for high power induction heating applications as melting of steel and non ferrous metals, annealing of metals, surface hardening of steel and cast iron work pieces and hot water producers, steamers and super heated steamers. This high frequency power conversion circuit can operate from three-phase systems to produce high current for high power induction heating applications under the principles of ZVS and it can regulate its ac output power from the rated value to a low power level. A dual mode modulation control scheme based on high frequency PWM in synchronization with the utility frequency positive and negative half cycles for the proposed high frequency conversion circuit and utility frequency pulse density modulation is produced to extend its soft switching operating range for wide ac output power regulation. A dual packs heat exchanger assembly is designed to be used in consumer and industrial fluid pipeline systems and it is proved to be suitable for the hot water, steam and super heated steam producers. Experiment and simulation results are given in this paper to verify the operation principles of the proposed ac conversion circuit and to evaluate its power regulation and conversion efficiency. Also, the paper presents a mutual coupling model of the induction heating load instead of equivalent transformer circuit model.

Efficient Pipelined Hardware Implementation of RIPEMD-160 Hash Function

In this paper an efficient implementation of Ripemd- 160 hash function is presented. Hash functions are a special family of cryptographic algorithms, which is used in technological applications with requirements for security, confidentiality and validity. Applications like PKI, IPSec, DSA, MAC-s incorporate hash functions and are used widely today. The Ripemd-160 is emanated from the necessity for existence of very strong algorithms in cryptanalysis. The proposed hardware implementation can be synthesized easily for a variety of FPGA and ASIC technologies. Simulation results, using commercial tools, verified the efficiency of the implementation in terms of performance and throughput. Special care has been taken so that the proposed implementation doesn-t introduce extra design complexity; while in parallel functionality was kept to the required levels.

JConqurr - A Multi-Core Programming Toolkit for Java

With the popularity of the multi-core and many-core architectures there is a great requirement for software frameworks which can support parallel programming methodologies. In this paper we introduce an Eclipse toolkit, JConqurr which is easy to use and provides robust support for flexible parallel progrmaming. JConqurr is a multi-core and many-core programming toolkit for Java which is capable of providing support for common parallel programming patterns which include task, data, divide and conquer and pipeline parallelism. The toolkit uses an annotation and a directive mechanism to convert the sequential code into parallel code. In addition to that we have proposed a novel mechanism to achieve the parallelism using graphical processing units (GPU). Experiments with common parallelizable algorithms have shown that our toolkit can be easily and efficiently used to convert sequential code to parallel code and significant performance gains can be achieved.

Maximum Water Hammer Sensitivity Analysis

Pressure waves and Water Hammer occur in a pumping system when valves are closed or opened suddenly or in the case of sudden failure of pumps. Determination of maximum water hammer is considered one of the most important technical and economical items of which engineers and designers of pumping stations and conveyance pipelines should take care. Hammer Software is a recent application used to simulate water hammer. The present study focuses on determining significance of each input parameter of the application relative to the maximum amount of water hammer estimated by the software. The study determines estimated maximum water hammer variations due to variations of input parameters including water temperature, pipe type, thickness and diameter, electromotor rpm and power, and moment of inertia of electromotor and pump. In our study, Kuhrang Pumping Station was modeled using WaterGEMS Software. The pumping station is characterized by total discharge of 200 liters per second, dynamic height of 194 meters and 1.5 kilometers of steel conveyance pipeline and transports water to Cheshme Morvarid for farmland irrigation. The model was run in steady hydraulic condition and transferred to Hammer Software. Then, the model was run in several unsteady hydraulic conditions and sensitivity of maximum water hammer to each input parameter was calculated. It is shown that parameters to which maximum water hammer is most sensitive are moment of inertia of pump and electromotor, diameter, type and thickness of pipe and water temperature, respectively.

FPGA Based Longitudinal and Lateral Controller Implementation for a Small UAV

This paper presents implementation of attitude controller for a small UAV using field programmable gate array (FPGA). Due to the small size constrain a miniature more compact and computationally extensive; autopilot platform is needed for such systems. More over UAV autopilot has to deal with extremely adverse situations in the shortest possible time, while accomplishing its mission. FPGAs in the recent past have rendered themselves as fast, parallel, real time, processing devices in a compact size. This work utilizes this fact and implements different attitude controllers for a small UAV in FPGA, using its parallel processing capabilities. Attitude controller is designed in MATLAB/Simulink environment. The discrete version of this controller is implemented using pipelining followed by retiming, to reduce the critical path and thereby clock period of the controller datapath. Pipelined, retimed, parallel PID controller implementation is done using rapidprototyping and testing efficient development tool of “system generator", which has been developed by Xilinx for FPGA implementation. The improved timing performance enables the controller to react abruptly to any changes made to the attitudes of UAV.

Design of OTA with Common Drain and Folded Cascade Used in ADC

In this report, an OTA which is used in fully differential pipelined ADC was described. Using gain-boost architecture with difference-ended amplifier, this OTA achieve high-gain and high-speed. Besides, the CMFB circuit is also used, and some methods are concerned to improve the performance. Then, by optimization the layout design, OTA-s mismatch was reduced. This design was using TSMC 0.18um CMOS process and simulation both schematic and layout in Cadence. The result of the simulation shows that the OTA has a gain up to 80dB,a unity gain bandwidth of about 1.437GHz for a 2pF load, a slew rate is about 428V/μs, a output swing is 0.2V~1.35V, with the power supply of 1.8V, the power consumption is 88mW. This amplifier was used in a 10bit 150MHz pipelined ADC.

Effective Self-Preservation of Methane Hydrate Particles in Crude Oils

In this work we investigated the behavior of methane hydrates dispersed in crude oils from different fields at temperatures below 0°C. In case of crude oil emulsion the size of water droplets is in the range of 50e100"m. The size of hydrate particles formed from droplets is the same. The self-preservation is not expected in this field. However, the self-preservation of hydrates with the size of particles 24±18"m (electron microscopy data) in suspensions is observed. Similar results were obtained for four different kinds of crude oil and model system such as asphaltenes, resins and wax in ndecane. This result can allow developing effective methods to prevent the formation and elimination of gas-hydrate plugs in pipelines under low temperature conditions (e. g. in Eastern Siberia). There is a prospective to use experiment results for working out the technology of associated petroleum gas recovery.

Wireless Sensor Networks for Long Distance Pipeline Monitoring

The main goal of this seminal paper is to introduce the application of Wireless Sensor Networks (WSN) in long distance infrastructure monitoring (in particular in pipeline infrastructure monitoring) – one of the on-going research projects by the Wireless Communication Research Group at the department of Electronic and Computer Engineering, Nnamdi Azikiwe University, Awka. The current sensor network architectures for monitoring long distance pipeline infrastructures are previewed. These are wired sensor networks, RF wireless sensor networks, integrated wired and wireless sensor networks. The reliability of these architectures is discussed. Three reliability factors are used to compare the architectures in terms of network connectivity, continuity of power supply for the network, and the maintainability of the network. The constraints and challenges of wireless sensor networks for monitoring and protecting long distance pipeline infrastructure are discussed.

Development of Neural Network Prediction Model of Energy Consumption

In the oil and gas industry, energy prediction can help the distributor and customer to forecast the outgoing and incoming gas through the pipeline. It will also help to eliminate any uncertainties in gas metering for billing purposes. The objective of this paper is to develop Neural Network Model for energy consumption and analyze the performance model. This paper provides a comprehensive review on published research on the energy consumption prediction which focuses on structures and the parameters used in developing Neural Network models. This paper is then focused on the parameter selection of the neural network prediction model development for energy consumption and analysis on the result. The most reliable model that gives the most accurate result is proposed for the prediction. The result shows that the proposed neural network energy prediction model is able to demonstrate an adequate performance with least Root Mean Square Error.

Flexible Wormhole-Switched Network-on-chip with Two-Level Priority Data Delivery Service

A synchronous network-on-chip using wormhole packet switching and supporting guaranteed-completion best-effort with low-priority (LP) and high-priority (HP) wormhole packet delivery service is presented in this paper. Both our proposed LP and HP message services deliver a good quality of service in term of lossless packet completion and in-order message data delivery. However, the LP message service does not guarantee minimal completion bound. The HP packets will absolutely use 100% bandwidth of their reserved links if the HP packets are injected from the source node with maximum injection. Hence, the service are suitable for small size messages (less than hundred bytes). Otherwise the other HP and LP messages, which require also the links, will experience relatively high latency depending on the size of the HP message. The LP packets are routed using a minimal adaptive routing, while the HP packets are routed using a non-minimal adaptive routing algorithm. Therefore, an additional 3-bit field, identifying the packet type, is introduced in their packet headers to classify and to determine the type of service committed to the packet. Our NoC prototypes have been also synthesized using a 180-nm CMOS standard-cell technology to evaluate the cost of implementing the combination of both services.

A Behavior Model of Discrete Sampling and Hold Amplifier based on AC Response

A kind of behavior model for discrete sampling and hold amplifier with charge transmission is analyzed. The transfer function and behavior features are based on the main AC responses of operation amplifier. The result used in pipelined and sigma-delta ADC shows the exact of model of sampling and hold amplifier, and the non-ideal factors are taken into account.

Effect of Corrosion on Hydrocarbon Pipelines

The demand of hydrocarbons has increased the construction of pipelines and the protection of the physical and mechanical integrity of the already existing infrastructure. Corrosion is the main reason of failures in the pipeline and it is mostly produced by acid (HCOOCH3). In this basis, a CFD code was used, in order to study the corrosion of internal wall of hydrocarbons pipeline. In this situation, the corrosion phenomenon shows a growing deposit, which causes defect damages (welding or fabrication) at diverse positions along the pipeline. The solution of the pipeline corrosion is based on the diminution of the Naphthenic acid.

A Reliable FPGA-based Real-time Optical-flow Estimation

Optical flow is a research topic of interest for many years. It has, until recently, been largely inapplicable to real-time applications due to its computationally expensive nature. This paper presents a new reliable flow technique which is combined with a motion detection algorithm, from stationary camera image streams, to allow flow-based analyses of moving entities, such as rigidity, in real-time. The combination of the optical flow analysis with motion detection technique greatly reduces the expensive computation of flow vectors as compared with standard approaches, rendering the method to be applicable in real-time implementation. This paper describes also the hardware implementation of a proposed pipelined system to estimate the flow vectors from image sequences in real time. This design can process 768 x 576 images at a very high frame rate that reaches to 156 fps in a single low cost FPGA chip, which is adequate for most real-time vision applications.

Low Power Low Voltage Current Mode Pipelined A/D Converters

This paper presents two prototypes of low power low voltage current mode 9 bit pipelined a/d converters. The first and the second converters are configured of 1.5 bit and 2.5 bit stages, respectively. The a/d converter structures are composed of current mode building blocks and final comparator block which converts the analog current signal into digital voltage signal. All building blocks have been designed in CMOS AMS 0.35μm technology, then simulated to verify proposed concept. The performances of both converters are compared to performances of known current mode and voltage mode switched capacitance converter structures. Low power consumption and small chip area are advantages of the proposed converters.

Recent Developments in Speed Control System of Pipeline PIGs for Deepwater Pipeline Applications

Pipeline infrastructures normally represent high cost of investment and the pipeline must be free from risks that could cause environmental hazard and potential threats to personnel safety. Pipeline integrity such monitoring and management become very crucial to provide unimpeded transportation and avoiding unnecessary production deferment. Thus proper cleaning and inspection is the key to safe and reliable pipeline operation and plays an important role in pipeline integrity management program and has become a standard industry procedure. In view of this, understanding the motion (dynamic behavior), prediction and control of the PIG speed is important in executing pigging operation as it offers significant benefits, such as estimating PIG arrival time at receiving station, planning for suitable pigging operation, and improves efficiency of pigging tasks. The objective of this paper is to review recent developments in speed control system of pipeline PIGs. The review carried out would serve as an industrial application in a form of quick reference of recent developments in pipeline PIG speed control system, and further initiate others to add-in/update the list in the future leading to knowledge based data, and would attract active interest of others to share their view points.

Reduced Order Modeling of Natural Gas Transient Flow in Pipelines

A reduced order modeling approach for natural gas transient flow in pipelines is presented. The Euler equations are considered as the governing equations and solved numerically using the implicit Steger-Warming flux vector splitting method. Next, the linearized form of the equations is derived and the corresponding eigensystem is obtained. Then, a few dominant flow eigenmodes are used to construct an efficient reduced-order model. A well-known test case is presented to demonstrate the accuracy and the computational efficiency of the proposed method. The results obtained are in good agreement with those of the direct numerical method and field data. Moreover, it is shown that the present reduced-order model is more efficient than the conventional numerical techniques for transient flow analysis of natural gas in pipelines.

FPGA Implementation of Generalized Maximal Ratio Combining Receiver Diversity

In this paper, we study FPGA implementation of a novel supra-optimal receiver diversity combining technique, generalized maximal ratio combining (GMRC), for wireless transmission over fading channels in SIMO systems. Prior published results using ML-detected GMRC diversity signal driven by BPSK showed superior bit error rate performance to the widely used MRC combining scheme in an imperfect channel estimation (ICE) environment. Under perfect channel estimation conditions, the performance of GMRC and MRC were identical. The main drawback of the GMRC study was that it was theoretical, thus successful FPGA implementation of it using pipeline techniques is needed as a wireless communication test-bed for practical real-life situations. Simulation results showed that the hardware implementation was efficient both in terms of speed and area. Since diversity combining is especially effective in small femto- and picocells, internet-associated wireless peripheral systems are to benefit most from GMRC. As a result, many spinoff applications can be made to the hardware of IP-based 4th generation networks.

Effect of Inhibitors on Weld Corrosion under Sweet Conditions Using Flow Channel

The aim of this paper is to compare the effectiveness and electrochemical behavior of typical oilfield corrosion inhibitors with previous oilfield corrosion inhibitors under the same electrochemical techniques to control preferential weld corrosion of X65 pipeline steel in artificial seawater saturated with carbon dioxide at a pressure of one bar. A secondary aim is to investigate the conditions under which current reversal takes place. A flow channel apparatus was used in the laboratory to simulate the actual condition that occurs in marine pipelines. Different samples from the parent metal, the weld metal and the heat affected zone in the pipeline steel were galvanically coupled. The galvanic currents flowing between the weld regions were recorded using zero-resistance ammeters and tested under static and flowing conditions in both inhibited and uninhibited media. The results show that a current reversal took place when 30ppm of both green oilfield inhibitors were present, resulting in accelerated weld corrosion.

Monitoring Sand Transport Characteristics in Multiphase Flow in Horizontal Pipelines Using Acoustic Emission Technology

This paper presents an experimental investigation using Acoustic Emission (AE) technology to monitor sand transportation in multiphase flow. The investigations were undertaken on three-phase (air-water-sand) flow in a horizontal pipe where the superficial gas velocity (VSG) had a range of between 0.2msˉ¹ to 2.0msˉ¹ and superficial liquid velocity (VSL) had a range of between 0.2msˉ¹ to 1.0msˉ¹. The experimental findings clearly show a correlation exists between AE energy levels, sand concentration, superficial gas velocity (VSG), and superficial liquid velocity (VSL).

Design of High-speed Modified Booth Multipliers Operating at GHz Ranges

This paper describes the pipeline architecture of high-speed modified Booth multipliers. The proposed multiplier circuits are based on the modified Booth algorithm and the pipeline technique which are the most widely used to accelerate the multiplication speed. In order to implement the optimally pipelined multipliers, many kinds of experiments have been conducted. The speed of the multipliers is greatly improved by properly deciding the number of pipeline stages and the positions for the pipeline registers to be inserted. We described the proposed modified Booth multiplier circuits in Verilog HDL and synthesized the gate-level circuits using 0.13um standard cell library. The resultant multiplier circuits show better performance than others. Since the proposed multipliers operate at GHz ranges, they can be used in the systems requiring very high performance.