Abstract: This paper presents an optimal duty-cycle modulation (ODCM) scheme for analog-to-digital conversion (ADC) systems. The overall ODCM-Based ADC problem is decoupled into optimal DCM and digital filtering sub-problems, while taking into account constraints of mutual design parameters between the two. Using a set of three lemmas and four morphological theorems, the ODCM sub-problem is modelled as a nonlinear cost function with nonlinear constraints. Then, a weighted least pth norm of the error between ideal and predicted frequency responses is used as a cost function for the digital filtering sub-problem. In addition, MATLAB fmincon and MATLAB iirlnorm tools are used as optimal DCM and least pth norm solvers respectively. Furthermore, the virtual simulation scheme of an overall prototyping ODCM-based ADC system is implemented and well tested with the help of Simulink tool according to relevant set of design data, i.e., 3 KHz of modulating bandwidth, 172 KHz of maximum modulation frequency and 25 MHZ of sampling frequency. Finally, the results obtained and presented show that the ODCM-based ADC achieves under 3 KHz of modulating bandwidth: 57 dBc of SINAD (signal-to-noise and distorsion), 58 dB of SFDR (Surpious free dynamic range) -80 dBc of THD (total harmonic distorsion), and 10 bits of minimum resolution. These performance levels appear to be a great challenge within the class of oversampling ADC topologies, with 2nd order IIR (infinite impulse response) decimation filter.
Abstract: In this paper, an Infinite Impulse Response (IIR) filter
has been designed and simulated on an Field Programmable Gate
Arrays (FPGA). The implementation is based on Multiply Add and
Accumulate (MAC) algorithm which uses multiply operations for
design implementation. Parallel Pipelined structure is used to
implement the proposed IIR Filter taking optimal advantage of the
look up table of target device. The designed filter has been
synthesized on Digital Signal Processor (DSP) slice based FPGA to
perform multiplier function of MAC unit. The DSP slices are useful
to enhance the speed performance. The proposed design is simulated
with Matlab, synthesized with Xilinx Synthesis Tool, and
implemented on FPGA devices. The Virtex 5 FPGA based design can
operate at an estimated frequency of 81.5 MHz as compared to 40.5
MHz in case of Spartan 3 ADSP based design. The Virtex 5 based
implementation also consumes less slices and slice flip flops of target
FPGA in comparison to Spartan 3 ADSP based implementation to
provide cost effective solution for signal processing applications.
Abstract: Noise removal techniques play a vital role in the performance of electrocardiographic (ECG) signal processing systems. ECG signals can be corrupted by various kinds of noise such as baseline wander noise, electromyographic interference, and powerline interference. One of the significant challenges in ECG signal processing is the degradation caused by additive 50 or 60 Hz powerline interference. This work investigates the removal of power line interference and suppression of transient response for filtering noise corrupted ECG signals. We demonstrate the effectiveness of infinite impulse response (IIR) notch filter with time varying pole radius for improving the transient behavior. The temporary change in the pole radius of the filter diminishes the transient behavior. Simulation results show that the proposed IIR filter with time varying pole radius outperforms traditional IIR notch filters in terms of mean square error and transient suppression.
Abstract: In this paper, a new model order reduction
phenomenon is introduced at the design stage of linear phase digital
IIR filter. The complexity of a system can be reduced by adopting the
model order reduction method in their design. In this paper a mixed
method of model order reduction is proposed for linear IIR filter. The
proposed method employs the advantages of factor division technique
to derive the reduced order denominator polynomial and the reduced
order numerator is obtained based on the resultant denominator
polynomial. The order reduction technique is used to reduce the delay
units at the design stage of IIR filter. The validity of the proposed
method is illustrated with design example in frequency domain and
stability is also examined with help of nyquist plot.
Abstract: In this paper, a design methodology to implement low-power and high-speed 2nd order recursive digital Infinite Impulse Response (IIR) filter has been proposed. Since IIR filters suffer from a large number of constant multiplications, the proposed method replaces the constant multiplications by using addition/subtraction and shift operations. The proposed new 6T adder cell is used as the Carry-Save Adder (CSA) to implement addition/subtraction operations in the design of recursive section IIR filter to reduce the propagation delay. Furthermore, high-level algorithms designed for the optimization of the number of CSA blocks are used to reduce the complexity of the IIR filter. The DSCH3 tool is used to generate the schematic of the proposed 6T CSA based shift-adds architecture design and it is analyzed by using Microwind CAD tool to synthesize low-complexity and high-speed IIR filters. The proposed design outperforms in terms of power, propagation delay, area and throughput when compared with MUX-12T, MCIT-7T based CSA adder filter design. It is observed from the experimental results that the proposed 6T based design method can find better IIR filter designs in terms of power and delay than those obtained by using efficient general multipliers.
Abstract: We present a subband adaptive infinite-impulse response (IIR) filtering method, which is based on a polyphase decomposition of IIR filter. Motivated by the fact that the polyphase structure has benefits in terms of convergence rate and stability, we introduce the polyphase decomposition to subband IIR filtering, i.e., in each subband high order IIR filter is decomposed into polyphase IIR filters with lower order. Computer simulations demonstrate that the proposed method has improved convergence rate over conventional IIR filters.
Abstract: In this paper, we proposed the direct method for converting
Finite-Impulse Response (FIR) filter with low nonzero tap
into Infinite-Impulse Response (IIR) filter using the pre-determined
table. The prony method is used by ghost cancellator which is IIR
approximation to FIR filter which is better performance than IIR and
have much larger calculation difference. The direct method for many
ghost combination with low nonzero tap of NTSC(National Television
System Committee) TV signal in Korea is described. The proposed
method is illustrated with an example.
Abstract: The design problem of Infinite Impulse Response (IIR)
digital filters is usually expressed as the minimization problem of
the complex magnitude error that includes both the magnitude and
phase information. However, the group delay of the filter obtained
by solving such design problem may be far from the desired group
delay. In this paper, we propose a design method of stable IIR digital
filters with prespecified maximum group delay errors. In the proposed
method, the approximation problems of the magnitude-phase and
group delay are separately defined, and these two approximation
problems are alternately solved using successive projections. As a
result, the proposed method can design the IIR filters that satisfy the
prespecified allowable errors for not only the complex magnitude but
also the group delay by alternately executing the coefficient update
for the magnitude-phase and the group delay approximation. The
usefulness of the proposed method is verified through some examples.
Abstract: This paper demonstrates the application of craziness based particle swarm optimization (CRPSO) technique for designing the 8th order low pass Infinite Impulse Response (IIR) filter. CRPSO, the much improved version of PSO, is a population based global heuristic search algorithm which finds near optimal solution in terms of a set of filter coefficients. Effectiveness of this algorithm is justified with a comparative study of some well established algorithms, namely, real coded genetic algorithm (RGA) and particle swarm optimization (PSO). Simulation results affirm that the proposed algorithm CRPSO, outperforms over its counterparts not only in terms of quality output i.e. sharpness at cut-off, pass band ripple, stop band ripple, and stop band attenuation but also in convergence speed with assured stability.