Abstract: An efficient architecture for low jitter All Digital
Phase Locked Loop (ADPLL) suitable for high speed SoC
applications is presented in this paper. The ADPLL is designed using
standard cells and described by Hardware Description Language
(HDL). The ADPLL implemented in a 90 nm CMOS process can
operate from 10 to 200 MHz and achieve worst case frequency
acquisition in 14 reference clock cycles. The simulation result shows
that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps
at 100MHz. Since the digitally controlled oscillator (DCO) can
achieve both high resolution and wide frequency range, it can meet
the demands of system-level integration. The proposed ADPLL can
easily be ported to different processes in a short time. Thus, it can
reduce the design time and design complexity of the ADPLL, making
it very suitable for System-on-Chip (SoC) applications.
Abstract: This paper presents a dynamic adaptation scheme for
the frequency of inter-deme migration in distributed genetic algorithms
(GA), and its VLSI hardware design. Distributed GA,
or multi-deme-based GA, uses multiple populations which evolve
concurrently. The purpose of dynamic adaptation is to improve
convergence performance so as to obtain better solutions. Through
simulation experiments, we proved that our scheme achieves better
performance than fixed frequency migration schemes.
Abstract: For more than 120 years, gold mining formed the
backbone the South Africa-s economy. The consequence of mine
closure was observed in large-scale land degradation and widespread
pollution of surface water and groundwater. This paper investigates
the feasibility of using natural zeolite in removing heavy metals
contaminating the Wonderfonteinspruit Catchment Area (WCA), a
water stream with high levels of heavy metals and radionuclide
pollution. Batch experiments were conducted to study the adsorption
behavior of natural zeolite with respect to Fe2+, Mn2+, Ni2+, and Zn2+.
The data was analysed using the Langmuir and Freudlich isotherms.
Langmuir was found to correlate the adsorption of Fe2+, Mn2+, Ni2+,
and Zn2+ better, with the adsorption capacity of 11.9 mg/g, 1.2 mg/g,
1.3 mg/g, and 14.7 mg/g, respectively. Two kinetic models namely,
pseudo-first order and pseudo second order were also tested to fit the
data. Pseudo-second order equation was found to be the best fit for
the adsorption of heavy metals by natural zeolite. Zeolite
functionalization with humic acid increased its uptake ability.
Abstract: Proposal for a secure stream cipher based on Linear Feedback Shift Registers (LFSR) is presented here. In this method, shift register structure used for polynomial modular division is combined with LFSR keystream generator to yield a new keystream generator with much higher periodicity. Security is brought into this structure by using the Boolean function to combine state bits of the LFSR keystream generator and taking the output through the Boolean function. This introduces non-linearity and security into the structure in a way similar to the Non-linear filter generator. The security and throughput of the suggested stream cipher is found to be much greater than the known LFSR based structures for the same key length.
Abstract: System-level design based on high-level abstractions
is becoming increasingly important in hardware and embedded
system design. This paper analyzes meta-design techniques oriented
at developing meta-programs and meta-models for well-understood
domains. Meta-design techniques include meta-programming and
meta-modeling. At the programming level of design process, metadesign
means developing generic components that are usable in a
wider context of application than original domain components. At the
modeling level, meta-design means developing design patterns that
describe general solutions to the common recurring design problems,
and meta-models that describe the relationship between different
types of design models and abstractions. The paper describes and
evaluates the implementation of meta-design in hardware design
domain using object-oriented and meta-programming techniques.
The presented ideas are illustrated with a case study.
Abstract: Dr Eliyahu Goldratt has done the pioneering work in
the development of Theory of Constraints. Since then, many more
researchers around the globe are working to enhance this body of
knowledge. In this paper, an attempt has been made to compile the
salient features of this theory from the work done by Goldratt and
other researchers. This paper will provide a good starting point to the
potential researchers interested to work in Theory of Constraints. The
paper will also help the practicing managers by clarifying their
concepts on the theory and will facilitate its successful
implementation in their working areas.
Abstract: A new digital transceiver circuit for asynchronous frame detection is proposed where both the transmitter and receiver contain all digital components, thereby avoiding possible use of conventional devices like monostable multivibrators with unstable external components such as resistances and capacitances. The proposed receiver circuit, in particular, uses a combinational logic block yielding an output which changes its state as soon as the start bit of a new frame is detected. This, in turn, helps in generating an efficient receiver sampling clock. A data latching circuit is also used in the receiver to latch the recovered data bits in any new frame. The proposed receiver structure is also extended from 4- bit information to any general n data bits within a frame with a common expression for the output of the combinational logic block. Performance of the proposed hardware design is evaluated in terms of time delay, reliability and robustness in comparison with the standard schemes using monostable multivibrators. It is observed from hardware implementation that the proposed circuit achieves almost 33 percent speed up over any conventional circuit.
Abstract: A satellite is being integrated and tested by BISEE (Beijing Institute of Spacecraft Environment Engineering). This paper describes the infrared lamp array simulation technology used for satellite thermal balance and thermal vacuum test. These tests were performed in KM6 space environmental simulator in Beijing, China. New software and hardware developed by BISEE, along with enhanced heat flux uniformity, provided for well accomplished thermal balance and thermal vacuum tests. The flux uniformity of lamp array was satisfied with test requirement. Monitored background radiometer offered reliable heat flux measurements with remarkable repeatability. Simulation software supplied accurate thermal flux distribution predictions.
Abstract: Artificial Neural Network (ANN) has been
extensively used for classification of heart sounds for its
discriminative training ability and easy implementation. However, it
suffers from overparameterization if the number of nodes is not
chosen properly. In such cases, when the dataset has redundancy
within it, ANN is trained along with this redundant information that
results in poor validation. Also a larger network means more
computational expense resulting more hardware and time related
cost. Therefore, an optimum design of neural network is needed
towards real-time detection of pathological patterns, if any from heart
sound signal. The aims of this work are to (i) select a set of input
features that are effective for identification of heart sound signals and
(ii) make certain optimum selection of nodes in the hidden layer for a
more effective ANN structure. Here, we present an optimization
technique that involves Singular Value Decomposition (SVD) and
QR factorization with column pivoting (QRcp) methodology to
optimize empirically chosen over-parameterized ANN structure.
Input nodes present in ANN structure is optimized by SVD followed
by QRcp while only SVD is required to prune undesirable hidden
nodes. The result is presented for classifying 12 common
pathological cases and normal heart sound.