Abstract: In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.
Abstract: In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.
Abstract: In this paper, we proposed a novel SCR (Silicon Controlled
Rectifier) - based ESD (Electrostatic Discharge) protection device for I/O
and power clamp. The proposed device has a higher holding voltage
characteristic than conventional SCR. These characteristics enable to have
latch-up immunity under normal operating conditions as well as superior full
chip ESD protection. The proposed device was analyzed to figure out
electrical characteristics and tolerance robustness in term of individual
design parameters (D1, D2, D3). They are investigated by using the
Synopsys TCAD simulator. As a result of simulation, holding voltage
increased with different design parameters. The holding voltage of the
proposed device changes from 3.3V to 7.9V. Also, N-Stack structure ESD
device with the high holding voltage is proposed. In the simulation results,
2-stack has holding voltage of 6.8V and 3-stack has holding voltage of
10.5V. The simulation results show that holding voltage of stacking
structure can be larger than the operation voltage of high-voltage
application.
Abstract: This paper proposed a silicon controller rectifier (SCR)
based ESD protection device to protect low voltage ESD for integrated
circuit. The proposed ESD protection device has low trigger voltage
and high holding voltage compared with conventional SCR-based
ESD protection devices. The proposed ESD protection circuit is
verified and compared by TCAD simulation. This paper verified
effective low voltage ESD characteristics with low trigger voltage of
5.79V and high holding voltage of 3.5V through optimization
depending on design variables (D1, D2, D3 and D4).
Abstract: This paper presents a SCR-based ESD protection devices for I/O clamp and power rail clamp, respectably. These devices have a low trigger voltage and high holding voltage characteristics than conventional SCR device. These devices are fabricated by using 0.35um BCD (Bipolar-CMOS-DMOS) processes. These devices were validated using a TLP system. From the experimental results, the device for I/O ESD clamp has a trigger voltage of 5.8V. Also, the device for power rail ESD clamp has a holding voltage of 7.7V.