Abstract: Electronic apex locators (EAL) has been widely used
clinically for measuring root canal working length with high accuracy,
which is crucial for successful endodontic treatment. In order to
maintain high accuracy in different measurement environments,
this study presented a system for root canal length measurement
based on multifrequency impedance method. This measuring system
can generate a sweep current with frequencies from 100 Hz to
1 MHz through a direct digital synthesizer. Multiple impedance
ratios with different combinations of frequencies were obtained
and transmitted by an analog-to-digital converter and several of
them with representatives will be selected after data process. The
system analyzed the functional relationship between these impedance
ratios and the distance between the file and the apex with statistics
by measuring plenty of teeth. The position of the apical foramen
can be determined by the statistical model using these impedance
ratios. The experimental results revealed that the accuracy of
the system based on multifrequency impedance ratios method to
determine the position of the apical foramen was higher than the
dual-frequency impedance ratio method. Besides that, for more
complex measurement environments, the performance of the system
was more stable.
Abstract: A Non-Contact Digital Music System has been conceptualized and implemented to create a new era of digital music. This system replaces the strings of a traditional stringed instrument with laser beams to avoid bruising of the user’s hand. The system consists of seven laser modules, detector modules and distance sensors that form the basic hardware blocks of this instrument. Arduino ATmega2560 microcontroller is used as the primary interface between the hardware and the software. MIDI (Musical Instrument Digital Interface) is used as the protocol to establish communication between the instrument and the virtual synthesizer software.
Abstract: This paper describes an optimization tool-based
design strategy for a Current Mode Logic CML divide-by-2 circuit.
Representing a building block for output frequency generation in a
RFID protocol based-frequency synthesizer, the circuit was designed
to minimize the power consumption for driving of multiple loads
with unbalancing (at transceiver level). Implemented with XFAB
XC08 180 nm technology, the circuit was optimized through
MunEDA WiCkeD tool at Cadence Virtuoso Analog Design
Environment ADE.
Abstract: The 4G front-end transceiver needs a high
performance which can be obtained mainly with an optimal
architecture and a multi-band Local Oscillator. In this study, we
proposed and presented a new architecture of multi-band frequency
synthesizer based on an Inverse Sine Phase Detector Phase Locked
Loop (ISPD PLL) without any filters and any controlled gain block
and associated with adapted multi band LC tuned VCO using a
several numeric controlled capacitive branches but not binary
weighted. The proposed architecture, based on 0.35μm CMOS
process technology, supporting Multi-band GSM/DCS/DECT/
UMTS/WiMax application and gives a good performances: a phase
noise @1MHz -127dBc and a Factor Of Merit (FOM) @ 1MHz -
186dB and a wide band frequency range (from 0.83GHz to 3.5GHz),
that make the proposed architecture amenable for monolithic
integration and 4G multi-band application.
Abstract: This paper discusses a systematic design of a Σ-Δ fractional-N Phase-Locked Loop based on HDL behavioral modeling. The proposed design consists in describing the mixed behavior of this PLL architecture starting from the specifications of each building block. The HDL models of critical PLL blocks have been described in VHDL-AMS to predict the different specifications of the PLL. The effect of different noise sources has been efficiently introduced to study the PLL system performances. The obtained results are compared with transistor-level simulations to validate the effectiveness of the proposed models for wireless applications in the frequency range around 2.45 GHz.
Abstract: This paper presents a rule-based text- to- speech
(TTS) Synthesis System for Standard Malay, namely SMaTTS. The
proposed system using sinusoidal method and some pre- recorded
wave files in generating speech for the system. The use of phone
database significantly decreases the amount of computer memory
space used, thus making the system very light and embeddable. The
overall system was comprised of two phases the Natural Language
Processing (NLP) that consisted of the high-level processing of text
analysis, phonetic analysis, text normalization and morphophonemic
module. The module was designed specially for SM to overcome
few problems in defining the rules for SM orthography system before
it can be passed to the DSP module. The second phase is the Digital
Signal Processing (DSP) which operated on the low-level process of
the speech waveform generation. A developed an intelligible and
adequately natural sounding formant-based speech synthesis system
with a light and user-friendly Graphical User Interface (GUI) is
introduced. A Standard Malay Language (SM) phoneme set and an
inclusive set of phone database have been constructed carefully for
this phone-based speech synthesizer. By applying the generative
phonology, a comprehensive letter-to-sound (LTS) rules and a
pronunciation lexicon have been invented for SMaTTS. As for the
evaluation tests, a set of Diagnostic Rhyme Test (DRT) word list was
compiled and several experiments have been performed to evaluate
the quality of the synthesized speech by analyzing the Mean Opinion
Score (MOS) obtained. The overall performance of the system as
well as the room for improvements was thoroughly discussed.
Abstract: In this paper, the main principles of text-to-speech synthesis system are presented. Associated problems which arise when developing speech synthesis system are described. Used approaches and their application in the speech synthesis systems for Azerbaijani language are shown.
Abstract: This paper describes the design of a programmable
FSK-modulator based on VCO and its implementation in 0.35m
CMOS process. The circuit is used to transmit digital data at
100Kbps rate in the frequency range of 400-600MHz. The design
and operation of the modulator is discussed briefly. Further the
characteristics of PLL, frequency synthesizer, VCO and the whole
design are elaborated. The variation among the proposed and tested
specifications is presented. Finally, the layout of sub-modules, pin
configurations, final chip and test results are presented.