Abstract: The residue number system (RNS), due to its
properties, is used in applications in which high performance
computation is needed. The carry free nature, which makes the
arithmetic, carry bounded as well as the paralleling facility is the
reason of its capability of high speed rendering. Since carry is not
propagated between the moduli in this system, the performance is
only restricted by the speed of the operations in each modulus. In this
paper a novel method of number representation by use of redundancy
is suggested in which {rn- 2,rn-1,rn} is the reference moduli set
where r=2k+1 and k =1, 2,3,.. This method achieves fast
computations and conversions and makes the circuits of them much
simpler.
Abstract: This research deals with investigations on the “Active
Generator" under rotor speed variations and output frequency
control. It runs at turbine speed and it is connected to a three phase
electrical power grid which has its own frequency different from
turbine frequency. In this regard the set composed of a four phase
synchronous generator and a natural commutated matrix converter
(NCMC) made with thyristors, is called active generator. It replaces a
classical mechanical gearbox which introduces many drawbacks. The
main idea in this article is the presentation of frequency control at
grid side when turbine runs at variable speed. Frequency control has
been done by linear and step variations of the turbine speed. Relation
between turbine speed (frequency) and main grid zero sequence
voltage frequency is presented.
Abstract: Three-phase induction machines are today a standard
for industrial electrical drives. Cost, reliability, robustness and maintenance free operation are among the reasons these machines are
replacing dc drive systems. The development of power electronics
and signal processing systems has eliminated one of the greatest
disadvantages of such ac systems, which is the issue of control. With
modern techniques of field oriented vector control, the task of
variable speed control of induction machines is no longer a
disadvantage. The need to increase system performance, particularly
when facing limits on the power ratings of power supplies and
semiconductors, motivates the use of phase number other than three,
In this paper a novel scheme of connecting two, three phase
induction motors in parallel fed by two inverters; viz. VSI and CSI
and their vector control is presented.
Abstract: This paper presents a comparison between two Pulse
Width Modulation (PWM) algorithms applied to a three-level Neutral
Point Clamped (NPC) Voltage Source Inverter (VSI). The first
algorithm applied is the triangular-sinusoidal strategy; the second is
the Space Vector Pulse Width Modulation (SVPWM) strategy. In the
first part, we present a topology of three-level NCP VSI. After that,
we develop the two PWM strategies to control this converter. At the
end the experimental results are presented.
Abstract: In this paper, based on steady-state models of Flexible
AC Transmission System (FACTS) devices, the sizing of static
synchronous series compensator (SSSC) controllers in transmission
network is formed as an optimization problem. The objective of this
problem is to reduce the transmission losses in the network. The
optimization problem is solved using particle swarm optimization
(PSO) technique. The Newton-Raphson load flow algorithm is
modified to consider the insertion of the SSSC devices in the
network. A numerical example, illustrating the effectiveness of the
proposed algorithm, is introduced. In addition, a novel model of a 3-
phase voltage source converter (VSC) that is suitable for series
connected FACTS a controller is introduced. The model is verified
by simulation using Power System Blockset (PSB) and Simulink
software.
Abstract: Implemented 5-bit 125-MS/s successive
approximation register (SAR) analog to digital converter (ADC) on
FPGA is presented in this paper.The design and modeling of a high
performance SAR analog to digital converter are based on monotonic
capacitor switching procedure algorithm .Spartan 3 FPGA is chosen
for implementing SAR analog to digital converter algorithm. SAR
VHDL program writes in Xilinx and modelsim uses for showing
results.
Abstract: Reversible logic is becoming more and more prominent
as the technology sets higher demands on heat, power, scaling
and stability. Reversible gates are able at any time to "undo" the
current step or function. Multiple-valued logic has the advantage of
transporting and evaluating higher bits each clock cycle than binary.
Moreover, we demonstrate in this paper, combining these disciplines
we can construct powerful multiple-valued reversible logic structures.
In this paper a reversible block implemented by pseudo floatinggate
can perform AD-function and a DA-function as its reverse
application.
Abstract: In this paper, half bridge DC-DC converters with
transformer isolation presented in the literature are analyzed for highcurrent
and low-voltage applications under the same operation
conditions, and compared in terms of losses and efficiency. The
conventional and improved half-bridge DC-DC converters are
simulated, and current and voltage waveforms are obtained for input
voltage Vdc=500V, output current IO=450A, output voltage VO=38V
and switching frequency fS=20kHz. IGBTs are used as power
semiconductor switches. The power losses of the semiconductor
devices are calculated from current and voltage waveforms. From
simulation results, it is seen that the capacitor switched half bridge
converter has the best efficiency value, and can be preferred at high
power and high frequency applications.
Abstract: Compaction testing methods allow at-speed detecting
of errors while possessing low cost of implementation. Owing to this
distinctive feature, compaction methods have been widely used for
built-in testing, as well as external testing. In the latter case, the
bandwidth requirements to the automated test equipment employed
are relaxed which reduces the overall cost of testing. Concurrent
compaction testing methods use operational signals to detect
misbehavior of the device under test and do not require input test
stimuli. These methods have been employed for digital systems only.
In the present work, we extend the use of compaction methods for
concurrent testing of analog-to-digital converters. We estimate
tolerance bounds for the result of compaction and evaluate the
aliasing rate.
Abstract: This paper proposes a zero-voltage transition (ZVT) PWM synchronous buck converter, which is designed to operate at low output voltage and high efficiency typically required for portable systems. To make the DC-DC converter efficient at lower voltage, synchronous converter is an obvious choice because of lower conduction loss in the diode. The high-side MOSFET is dominated by the switching losses and it is eliminated by the soft switching technique. Additionally, the resonant auxiliary circuit designed is also devoid of the switching losses. The suggested procedure ensures an efficient converter. Theoretical analysis, computer simulation, and experimental results are presented to explain the proposed schemes.
Abstract: This paper presents a pulse doubling technique in a 12-pulse ac-dc converter which supplies direct torque controlled motor drives (DTCIMD-s) in order to have better power quality conditions at the point of common coupling. The proposed technique increases the number of rectification pulses without significant changes in the installations and yields in harmonic reduction in both ac and dc sides. The 12-pulse rectified output voltage is accomplished via two paralleled six-pulse ac-dc converters each of them consisting of three-phase diode bridge rectifier. An autotransformer is designed to supply the rectifiers. The design procedure of magnetics is in a way such that makes it suitable for retrofit applications where a six-pulse diode bridge rectifier is being utilized. Independent operation of paralleled diode-bridge rectifiers, i.e. dc-ripple re-injection methodology, requires a Zero Sequence Blocking Transformer (ZSBT). Finally, a tapped interphase reactor is connected at the output of ZSBT to double the pulse numbers of output voltage up to 24 pulses. The aforementioned structure improves power quality criteria at ac mains and makes them consistent with the IEEE-519 standard requirements for varying loads. Furthermore, near unity power factor is obtained for a wide range of DTCIMD operation. A comparison is made between 6- pulse, 12-pulse, and proposed converters from view point of power quality indices. Results show that input current total harmonic distortion (THD) is less than 5% for the proposed topology at various loads.
Abstract: Multicarrier transmission system such as Orthogonal
Frequency Division Multiplexing (OFDM) is a promising technique
for high bit rate transmission in wireless communication system.
OFDM is a spectrally efficient modulation technique that can achieve
high speed data transmission over multipath fading channels without
the need for powerful equalization techniques. However the price
paid for this high spectral efficiency and less intensive equalization
is low power efficiency. OFDM signals are very sensitive to nonlinear
effects due to the high Peak-to-Average Power Ratio (PAPR),
which leads to the power inefficiency in the RF section of the
transmitter. This paper investigates the effect of PAPR reduction on
the performance parameter of multicarrier communication system.
Performance parameters considered are power consumption of Power
Amplifier (PA) and Digital-to-Analog Converter (DAC), power amplifier
efficiency, SNR of DAC and BER performance of the system.
From our analysis it is found that irrespective of PAPR reduction
technique being employed, the power consumption of PA and DAC
reduces and power amplifier efficiency increases due to reduction in
PAPR. Moreover, it has been shown that for a given BER performance
the requirement of Input-Backoff (IBO) reduces with reduction in
PAPR.
Abstract: This work is devoted to the calculation of the
undulatory parameters and the study of the influence thickness of
electrical sheet on overvoltage compared to the carcass and between
whorls (sections) of the asynchronous motors supplied with PWM
converters.
Abstract: Multiphasing of dc-dc converters has been known to give technical and economical benefits to low voltage high power buck regulator modules. A major advantage of multiphasing dc-dc converters is the improvement of input and output performances in the buck converter. From this aspect, a potential use would be in renewable energy where power quality plays an important factor. This paper presents the design of a 2-phase 200W boost converter for battery charging application. Analysis of results from hardware measurement of the boost converter demonstrates the benefits of using multiphase. Results from the hardware prototype of the 2-phase boost converter further show the potential extension of multiphase beyond its commonly used low voltage high current domains.
Abstract: Dynamic models of power converters are normally
time-varying because of their switching actions. Several approaches
are applied to analyze the power converters to achieve the timeinvariant
models suitable for system analysis and design via the
classical control theory. The paper presents how to derive dynamic
models of the power system consisting of a three-phase controlled
rectifier feeding an uncontrolled buck converter by using the
combination between the well known techniques called the DQ and
the generalized state-space averaging methods. The intensive timedomain
simulations of the exact topology model are used to support
the accuracies of the reported model. The results show that the
proposed model can provide good accuracies in both transient and
steady-state responses.
Abstract: In this paper, we propose an advanced ILQ control for the buck-converter via two-degrees of freedom servo-system. Our presented strategy is based on Inverse Linear Quadratic (ILQ) servo-system controller without solving Riccati-s equation directly. The optimal controller of the current and voltage control system is designed. The stability and robust control are analyzed. A conscious and persistent effort has been made to improve ILQ control via two-degrees of freedom guarantees the optimal gains on the basis of polynomial pole assignment, which our results of the proposed strategy shows that the advanced ILQ control can be controlled independently the step response and the disturbance response by appending a feed-forward compensator.
Abstract: Pipeline ADCs are becoming popular at high speeds
and with high resolution. This paper discusses the options of number
of bits/stage conversion techniques in pipelined ADCs and their
effect on Area, Speed, Power Dissipation and Linearity. The basic
building blocks like op-amp, Sample and Hold Circuit, sub converter,
DAC, Residue Amplifier used in every stage is assumed to be
identical. The sub converters use flash architectures. The design is
implemented using 0.18
Abstract: Process control and energy conservation are the two
primary reasons for using an adjustable speed drive. However,
voltage sags are the most important power quality problems facing
many commercial and industrial customers. The development of
boost converters has raised much excitement and speculation
throughout the electric industry. Now utilities are looking to these
devices for performance improvement and reliability in a variety of
areas. Examples of these include sags, spikes, or transients in supply
voltage as well as unbalanced voltages, poor electrical system
grounding, and harmonics. In this paper, simulations results are
presented for the verification of the proposed boost converter
topology. Boost converter provides ride through capability during
sag and swell. Further, input currents are near sinusoidal. This
eliminates the need of braking resistor also.
Abstract: The demand for new telecommunication services requiring higher capacities, data rates and different operating modes have motivated the development of new generation multi-standard wireless transceivers. A multi-standard design often involves extensive system level analysis and architectural partitioning, typically requiring extensive calculations. In this research, a decimation filter design tool for wireless communication standards consisting of GSM, WCDMA, WLANa, WLANb, WLANg and WiMAX is developed in MATLAB® using GUIDE environment for visual analysis. The user can select a required wireless communication standard, and obtain the corresponding multistage decimation filter implementation using this toolbox. The toolbox helps the user or design engineer to perform a quick design and analysis of decimation filter for multiple standards without doing extensive calculation of the underlying methods.
Abstract: This paper proposes two types of non-isolated
direct AC-DC converters. First, it shows a buck-boost
converter with an H-bridge, which requires few components
(three switches, two diodes, one inductor and one capacitor) to
convert AC input to DC output directly. This circuit can handle
a wide range of output voltage. Second, a direct AC-DC buck
converter is proposed for lower output voltage applications.
This circuit is analyzed with output voltage of 12V. We
describe circuit topologies, operation principles and simulation
results for both circuits.