Facilitating Cooperative Knowledge Support by Role-Based Knowledge-Flow Views

Effective knowledge support relies on providing operation-relevant knowledge to workers promptly and accurately. A knowledge flow represents an individual-s or a group-s knowledge-needs and referencing behavior of codified knowledge during operation performance. The flow has been utilized to facilitate organizational knowledge support by illustrating workers- knowledge-needs systematically and precisely. However, conventional knowledge-flow models cannot work well in cooperative teams, which team members usually have diverse knowledge-needs in terms of roles. The reason is that those models only provide one single view to all participants and do not reflect individual knowledge-needs in flows. Hence, we propose a role-based knowledge-flow view model in this work. The model builds knowledge-flow views (or virtual knowledge flows) by creating appropriate virtual knowledge nodes and generalizing knowledge concepts to required concept levels. The customized views could represent individual role-s knowledge-needs in teamwork context. The novel model indicates knowledge-needs in condensed representation from a roles perspective and enhances the efficiency of cooperative knowledge support in organizations.

FPGA Implement of a Vision Based Lane Departure Warning System

Using vision based solution in intelligent vehicle application often needs large memory to handle video stream and image process which increase complexity of hardware and software. In this paper, we present a FPGA implement of a vision based lane departure warning system. By taking frame of videos, the line gradient of line is estimated and the lane marks are found. By analysis the position of lane mark, departure of vehicle will be detected in time. This idea has been implemented in Xilinx Spartan6 FPGA. The lane departure warning system used 39% logic resources and no memory of the device. The average availability is 92.5%. The frame rate is more than 30 frames per second (fps).

Detecting Interactions between Behavioral Requirements with OWL and SWRL

High quality requirements analysis is one of the most crucial activities to ensure the success of a software project, so that requirements verification for software system becomes more and more important in Requirements Engineering (RE) and it is one of the most helpful strategies for improving the quality of software system. Related works show that requirement elicitation and analysis can be facilitated by ontological approaches and semantic web technologies. In this paper, we proposed a hybrid method which aims to verify requirements with structural and formal semantics to detect interactions. The proposed method is twofold: one is for modeling requirements with the semantic web language OWL, to construct a semantic context; the other is a set of interaction detection rules which are derived from scenario-based analysis and represented with semantic web rule language (SWRL). SWRL based rules are working with rule engines like Jess to reason in semantic context for requirements thus to detect interactions. The benefits of the proposed method lie in three aspects: the method (i) provides systematic steps for modeling requirements with an ontological approach, (ii) offers synergy of requirements elicitation and domain engineering for knowledge sharing, and (3)the proposed rules can systematically assist in requirements interaction detection.

FPGA Implementation of a Vision-Based Blind Spot Warning System

Vision-based intelligent vehicle applications often require large amounts of memory to handle video streaming and image processing, which in turn increases complexity of hardware and software. This paper presents an FPGA implement of a vision-based blind spot warning system. Using video frames, the information of the blind spot area turns into one-dimensional information. Analysis of the estimated entropy of image allows the detection of an object in time. This idea has been implemented in the XtremeDSP video starter kit. The blind spot warning system uses only 13% of its logic resources and 95k bits block memory, and its frame rate is over 30 frames per sec (fps).