Abstract: A vertical SOI-based MOSFET with trench body
structure operated as 1T DRAM cell at various temperatures has been
studied and investigated. Different operation temperatures are
assigned for the device for its performance comparison, thus the
thermal stability is carefully evaluated for the future memory device
applications. Based on the simulation, the vertical SOI-based
MOSFET with trench body structure demonstrates the electrical
characteristics properly and possess conspicuous kink effect at
various operation temperatures. Transient characteristics were also
performed to prove that its programming window values and
retention time behaviors are acceptable when the new 1T DRAM cell
is operated at high operation temperature.
Abstract: In this paper, we have proposed a novel FinFET with
extended body under the poly gate, which is called EB-FinFET, and
its characteristic is demonstrated by using three-dimensional (3-D)
numerical simulation. We have analyzed and compared it with
conventional FinFET. The extended body height dependence on the
drain induced barrier lowering (DIBL) and subthreshold swing (S.S)
have been also investigated. According to the 3-D numerical
simulation, the proposed structure has a firm structure, an acceptable
short channel effect (SCE), a reduced series resistance, an increased
on state drain current (I
on) and a large normalized I
DS. Furthermore,
the structure can also improve corner effect and reduce self-heating
effect due to the extended body. Our results show that the EBFinFET
is excellent for nanoscale device.
Abstract: In this paper, we propose a novel metal oxide
semiconductor field effect transistor with L-shaped channel structure
(LMOS), and several type of L-shaped structures are also designed,
studied and compared with the conventional MOSFET device for the
same average gate length (Lavg). The proposed device electrical
characteristics are analyzed and evaluated by three dimension (3-D)
ISE-TCAD simulator. It can be confirmed that the LMOS devices
have higher on-state drain current and both lower drain-induced
barrier lowering (DIBL) and subthreshold swing (S.S.) than its
conventional counterpart has. In addition, the transconductance and
voltage gain properties of the LMOS are also improved.