Abstract: This paper is interested in two difficulties encountered in practice when observing a continuous time process. The first is that we cannot observe a process over a time interval; we only take discrete observations. The second is the process frequently observed with a constant additive error. It is important to give an estimator of the spectral density of such a process taking into account the additive observation error and the choice of the discrete observation times. In this work, we propose an estimator based on the spectral smoothing of the periodogram by the polynomial Jackson kernel reducing the additive error. In order to solve the aliasing phenomenon, this estimator is constructed from observations taken at well-chosen times so as to reduce the estimator to the field where the spectral density is not zero. We show that the proposed estimator is asymptotically unbiased and consistent. Thus we obtain an estimate solving the two difficulties concerning the choice of the instants of observations of a continuous time process and the observations affected by a constant error.
Abstract: This work focuses on the symmetric alpha stable process with continuous time frequently used in modeling the signal with indefinitely growing variance, often observed with an unknown additive error. The objective of this paper is to estimate this error from discrete observations of the signal. For that, we propose a method based on the smoothing of the observations via Jackson polynomial kernel and taking into account the width of the interval where the spectral density is non-zero. This technique allows avoiding the “Aliasing phenomenon” encountered when the estimation is made from the discrete observations of a process with continuous time. We have studied the convergence rate of the estimator and have shown that the convergence rate improves in the case where the spectral density is zero at the origin. Thus, we set up an estimator of the additive error that can be subtracted for approaching the original signal without error.
Abstract: Unwanted side effects because of spectral aliasing and spectral imaging during signal processing would be the major concern over the sampling rate alteration. Multirate-multistage implementation of digital filter could come about a large computational saving than single rate filter suitable for sample rate conversion. This implementation can further improve through high-level architectural transformation in circuit level. Reallocating registers and relocating flip-flops across logic gates through retiming certainly a prominent sequential transformation technology, that optimize hardware circuits to achieve faster clocking speed without affecting the functionality. In this paper, we proposed an efficient compensated cascade Integrator comb (CIC) decimation filter structure that analyze the consequence of filter order variation which has a retimed FIR filter being compensator while using the cutset retiming technique and achieved an improvement in the passband droop by 14% to 39%, in computation time by 38.04%, 25.78%, 12.21%, 6.69% and 4.44% and reduction in path delay by 62.27%, 72%, 86.63%, 91.56% and 94.42% of 3, 6, 8, 12 and 24 order filter respectively than the non-retimed CIC compensation filter.
Abstract: Any digital processing performed on a signal with larger nyquist interval requires more computation than signal processing performed on smaller nyquist interval. The sampling rate alteration generates the unwanted effects in the system such as spectral aliasing and spectral imaging during signal processing. Multirate-multistage implementation of digital filter can result a significant computational saving than single rate filter designed for sample rate conversion. In this paper, we presented an efficient cascaded integrator comb (CIC) decimation filter that perform fast down sampling using signed digit adder algorithm with compensated frequency droop that arises due to aliasing effect during the decimation process. This proposed compensated CIC decimation filter structure with a hybrid signed digit (HSD) fast adder provide an improved performance in terms of down sampling speed by 65.15% than ripple carry adder (RCA) and reduced area and power by 57.5% and 0.01 % than signed digit (SD) adder algorithms respectively.
Abstract: This paper investigates the impact on operating time delay and relay maloperation when 1st,2nd and 3rd order analog antialiasing filters are used in numerical distance protection. RC filter with cut-off frequency 90 Hz is used. Simulations are carried out for different SIR (Source to line Impedance Ratio), load, fault type and fault conditions using SIMULINK, where the voltage and current signals are fed online to the developed numerical distance relay model. Matlab is used for plotting the impedance trajectory. Investigation results shows that, about 75 % of the simulated cases, numerical distance relay operating time is not increased even-though there is a time delay when higher order filters are used. Relay maloperation (selectivity) also reduces (increases) when higher order filters are used in numerical distance protection.
Abstract: Compaction testing methods allow at-speed detecting
of errors while possessing low cost of implementation. Owing to this
distinctive feature, compaction methods have been widely used for
built-in testing, as well as external testing. In the latter case, the
bandwidth requirements to the automated test equipment employed
are relaxed which reduces the overall cost of testing. Concurrent
compaction testing methods use operational signals to detect
misbehavior of the device under test and do not require input test
stimuli. These methods have been employed for digital systems only.
In the present work, we extend the use of compaction methods for
concurrent testing of analog-to-digital converters. We estimate
tolerance bounds for the result of compaction and evaluate the
aliasing rate.
Abstract: Virtual Assembly (VA) is one of the key technologies
in advanced manufacturing field. It is a promising application of
virtual reality in design and manufacturing field. It has drawn much
interest from industries and research institutes in the last two decades.
This paper describes a process for integrating an interactive Virtual
Reality-based assembly simulation of a digital mockup with the
CAD/CAM infrastructure. The necessary hardware and software
preconditions for the process are explained so that it can easily be
adopted by non VR experts. The article outlines how assembly
simulation can improve the CAD/CAM procedures and structures;
how CAD model preparations have to be carried out and which
virtual environment requirements have to be fulfilled. The issue of
data transfer is also explained in the paper. The other challenges and
requirements like anti-aliasing and collision detection have also been
explained. Finally, a VA simulation has been carried out for a ball
valve assembly and a car door assembly with the help of Vizard
virtual reality toolkit in a semi-immersive environment and their
performance analysis has been done on different workstations to
evaluate the importance of graphical processing unit (GPU) in the
field of VA.
Abstract: In this paper, various algorithms for designing quadrature mirror filter are reviewed and a new algorithm is presented for the design of near perfect reconstruction quadrature mirror filter bank. In the proposed algorithm, objective function is formulated using the perfect reconstruction condition or magnitude response condition of prototype filter at frequency (ω = 0.5π) in ideal condition. The cutoff frequency is iteratively changed to adjust the filters coefficients using optimization algorithm. The performances of the proposed algorithm are evaluated in term of computation time, reconstruction error and number of iterations. The design examples illustrate that the proposed algorithm is superior in term of peak reconstruction error, computation time, and number of iterations. The proposed algorithm is simple, easy to implement, and linear in nature.
Abstract: The tree structured approach of non-uniform filterbank
(NUFB) is normally used in perfect reconstruction (PR). The PR is
not always feasible due to certain limitations, i.e, constraints in
selecting design parameters, design complexity and some times
output is severely affected by aliasing error if necessary and
sufficient conditions of PR is not satisfied perfectly. Therefore, there
has been generalized interest of researchers to go for near perfect
reconstruction (NPR). In this proposed work, an optimized tree
structure technique is used for the design of NPR non-uniform
filterbank. Window functions of Blackman family are used to design
the prototype FIR filter. A single variable linear optimization is used
to minimize the amplitude distortion. The main feature of the
proposed design is its simplicity with linear phase property.
Abstract: This work consists of three parts. First, the alias-free
condition for the conventional two-channel quadrature mirror filter
bank is analyzed using complex arithmetic. Second, the approach
developed in the first part is applied to the complex quadrature mirror
filter bank. Accordingly, the structure is simplified and the theory is
easier to follow. Finally, a new class of complex quadrature mirror
filter banks is proposed. Interesting properties of this new structure
are also discussed.