Abstract: The resistive-inductive-capacitive behavior of long
interconnects which are driven by CMOS gates are presented in this
paper. The analysis is based on the ¤Ç-model of a RLC load and is
developed for submicron devices. Accurate and analytical
expressions for the output load voltage, the propagation delay and the
short circuit power dissipation have been proposed after solving a
system of differential equations which accurately describe the
behavior of the circuit. The effect of coupling capacitance between
input and output and the short circuit current on these performance
parameters are also incorporated in the proposed model. The
estimated proposed delay and short circuit power dissipation are in
very good agreement with the SPICE simulation with average
relative error less than 6%.