Abstract: This paper describes I²C Slave implementation using
I²C master obtained from the OpenCores website. This website
provides free Verilog and VHDL Codes to users. The design
implementation for the I²C slave is in Verilog Language and uses
EDA tools for ASIC design known as ModelSim from Mentor
Graphic. This tool is used for simulation and verification purposes.
Common application for this I²C Master-Slave integration is also
included. This paper also addresses the advantages and limitations of
the said design.
Abstract: This paper is about method to produce a stable and
accurate constant output pulse width regardless of the amplitude,
period and pulse width variation of the input signal source. The pulse
generated is usually being used in numerous applications as the
reference input source to other circuits in the system. Therefore, it is
crucial to produce a clean and constant pulse width to make sure the
system is working accurately as expected.