Abstract: This paper presents a thirteen-level asymmetrical
cascaded H-bridge single phase inverter. In this configuration, the
desired output voltage level is achieved by connecting the DC sources in
different combinations by triggering the switches. The modes of
operation are explained well for positive level generations. Moreover, a
comparison is made with conventional topologies of diode clamped,
flying capacitors and cascaded-H-bridge and some recently proposed
topologies to show the significance of the proposed topology in terms of
reduced part counts. The simulation work has been carried out in
MATLAB/Simulink environment. The experimental work is also carried
out for lower rating to verify the performance and feasibility of the
proposed topology. Further the results are presented for different loading
conditions.
Abstract: The multi-level inverters present an important novelty in the field of energy control with high voltage and power. The major advantage of all multi-level inverters is the improvement and spectral quality of its generated output signals. In recent years, various pulse width modulation techniques have been developed. From these technics we have: Sinusoidal Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM). This work presents a detailed analysis of the comparative advantage of space vector pulse width modulation (SVPWM) and the standard SPWM technique for Three Level Diode Clamped Inverter fed Induction Motor. The comparison is based on the evaluation of harmonic distortion THD.
Abstract: The global energy consumption is increasing persistently and need for distributed power generation through renewable energy is essential. To meet the power requirements for consumers without any voltage fluctuations and losses, modeling and design of multilevel inverter with Flexible AC Transmission System (FACTS) capability is presented. The presented inverter is provided with 13-level cascaded H-bridge topology of Insulated Gate Bipolar Transistor (IGBTs) connected along with inbuilt Distributed Static Synchronous Compensators (DSTATCOM). The DSTATCOM device provides control of power factor stability at local feeder lines and the inverter eliminates Total Harmonic Distortion (THD). The 13-level inverter utilizes 52 switches of each H-bridge is fed with single DC sources separately and the Pulse Width Modulation (PWM) technique is used for switching IGBTs. The control strategy implemented for inverter transmits active power to grid as well as it maintains power factor to be stable with achievement of steady state power transmission. Significant outcome of this project is improvement of output voltage quality with steady state power transmission with low THD. Simulation of inverter with DSTATCOM is performed using MATLAB/Simulink environment. The scaled prototype model of proposed inverter is built and its results were validated with simulated results.
Abstract: This paper presents the simulation results of the
effects of sampling frequency on the total harmonic distortion (THD)
of three-phase inverters using the space vector pulse width
modulation (SVPWM) and space vector control (SVC) algorithms.
The relationship between the variables was studied using curve fitting
techniques, and it has been shown that, for 50 Hz inverters, there is
an exponential relation between the sampling frequency and THD up
to around 8500 Hz, beyond which the performance of the model
becomes irregular, and there is an negative exponential relation
between the sampling frequency and the marginal improvement to
the THD. It has also been found that the performance of SVPWM is
better than that of SVC with the same sampling frequency in most
frequency range, including the range where the performance of the
former is irregular.
Abstract: The study aimed to evaluated the reproductive performance response to short term oestrus synchronization during the transition period. One hundred and sixty-five indigenous multiparous non-lactating goats were subdivided into the following six treatment groups for oestrus synchronization: NT control Group (N= 30), Fe-21d, FGA vaginal sponge for 21days+eCG at 19thd; FPe- 11d, FGA 11d + PGF2α and eCG at 9th d; FPe-10d, FGA 10d+ PGF2α and eCG at 8th d; FPe-9d, FGA 9d +PGF2α and eCG at 7thd; PFe-5d, PGF2α at d0 + FGA 5d + eCG at 5thd. The goats were natural mated (1 male/6 females). Fecundity rates (n. births /n. females treated x 100) were statistically higher (P < 0.05) in short term FPe-9d (157.9%), FPe- 11d (115.4%), FPe-10d (111.1%) and PFe-5d (107.7%) groups compared to the NT control Group (66.7%).
Abstract: Pulse width modulation (PWM) techniques have been
the subject of intensive research for different industrial and power
sector applications. A large variety of methods, different in concept
and performance, have been newly developed and described. This
paper analyzes the comparative merits of Sinusoidal Pulse Width
Modulation (SPWM) and Space Vector Pulse Width Modulation
(SVPWM) techniques and the suitability of these techniques in a
Shunt Active Filter (SAF). The objective is to select the scheme that
offers effective utilization of DC bus voltage and also harmonic
reduction at the input side. The effectiveness of the PWM techniques
is tested in the SAF configuration with a non linear load. The
performance of the SAF with the SPWM and (SVPWM) techniques
are compared with respect to the THD in source current. The study
reveals that in the context of closed loop SAF control with the
SVPWM technique there is only a minor improvement in THD. The
utilization of the DC bus with SVPWM is also not significant
compared to that with SPWM because of the non sinusoidal
modulating signal from the controller in SAF configuration.
Abstract: This paper present a MATLAB-SIMULINK model of a single phase 2.5 KVA, 240V RMS controlled PV VSI (Photovoltaic Voltage Source Inverter) inverter using IGBTs (Insulated Gate Bipolar Transistor). The behavior of output voltage, output current, and the total harmonic distortion (THD), with the variation in input dc blocking capacitor (Cdc), for linear and non-linear load has been analyzed. The values of Cdc as suggested by the other authors in their papers are not clearly defined and it poses difficulty in selecting the proper value. As the dc power stored in Cdc, (generally placed parallel with battery) is used as input to the VSI inverter. The simulation results shows the variation in the output voltage and current with different values of Cdc for linear and non-linear load connected at the output side of PV VSI inverter and suggest the selection of suitable value of Cdc.