Abstract: In this paper, fault recovery for parallel interconnected
asynchronous sequential machines is studied. An adversarial input
can infiltrate into one of two submachines comprising parallel
composition of the considered asynchronous sequential machine,
causing an unauthorized state transition. The control objective is to
elucidate the condition for the existence of a corrective controller
that makes the closed-loop system immune against any occurrence
of adversarial inputs. In particular, an efficient existence condition
is presented that does not need the complete modeling of the
interconnected asynchronous sequential machine.
Abstract: With global aging, people who require care, such as people with dementia (PwD), are increasing within many developed countries. And PwDs may wander and unconsciously set foot outdoors, it may lead serious accidents, such as, traffic accidents. Here, round-the-clock monitoring by caregivers is necessary, which can be a burden for the caregivers. Therefore, an automatic wandering detection system is required when an elderly person wanders outdoors, in which case the detection system transmits a ‘moving’ followed by an ‘absence’ state. In this paper, we focus on the transition from the ‘resting’ to the ‘absence’ state, via the ‘moving’ state as one of the wandering transitions. To capture the transition of the three states, our method based on the hidden Markov model (HMM) is built. Using our method, the restraint where the ‘resting’ state and ‘absence’ state cannot be transmitted to each other is applied. To validate our method, we conducted the experiment with 10 subjects. Our results show that the method can classify three states with 0.92 accuracy.
Abstract: Power management techniques are necessary to save power in the microprocessor. By changing the frequency and/or operating voltage of processor, DVFS can control power consumption. In this paper, we perform a case study to find optimal power state transition for DVFS. We propose the equation to find the optimal ratio between executions of states while taking into account the deadline of processing time and the power state transition delay overhead. The experiment is performed on the Cortex-M4 processor, and average 6.5% power saving is observed when DVFS is applied under the deadline condition.
Abstract: Embedded hardware simulator is a valuable computeraided
tool for embedded application development. This paper focuses
on the ARM926EJ-S MMU, builds state transition models and
formally verifies critical properties for the models. The state transition
models include loading instruction model, reading data model, and
writing data model. The properties of the models are described by
CTL specification language, and they are verified in VIS. The results
obtained in VIS demonstrate that the critical properties of MMU are
satisfied in the state transition models. The correct models can be
used to implement the MMU component in our simulator. In the
end of this paper, the experimental results show that the MMU can
successfully accomplish memory access requests from CPU.
Abstract: Using state space technique and GF(2) theory, a
simulation model for external exclusive NOR type LFSR structures is
developed. Through this tool a systematic procedure is devised for
computing pseudo-random binary sequences from such structures.
Abstract: A separation-kernel-based operating system (OS) has been designed for use in secure embedded systems by applying formal methods to the design of the separation-kernel part. The separation kernel is a small OS kernel that provides an abstract distributed environment on a single CPU. The design of the separation kernel was verified using two formal methods, the B method and the Spin model checker. A newly designed semi-formal method, the extended state transition method, was also applied. An OS comprising the separation-kernel part and additional OS services on top of the separation kernel was prototyped on the Intel IA-32 architecture. Developing and testing of a prototype embedded application, a point-of-sale application, on the prototype OS demonstrated that the proposed architecture and the use of formal methods to design its kernel part are effective for achieving a secure embedded system having a high-assurance separation kernel.
Abstract: The UML modeling of complex distributed systems often is a great challenge due to the large amount of parallel real-time operating components. In this paper the problems of verification of such systems are discussed. ECPN, an Extended Colored Petri Net is defined to formally describe state transitions of components and interactions among components. The relationship between sequence diagrams and Free Choice Petri Nets is investigated. Free Choice Petri Net theory helps verifying the liveness of sequence diagrams. By converting sequence diagrams to ECPNs and then comparing behaviors of sequence diagram ECPNs and statecharts, the consistency among models is analyzed. Finally, a verification process for an example model is demonstrated.
Abstract: Many studies have focused on the nonlinear analysis
of electroencephalography (EEG) mainly for the characterization of
epileptic brain states. It is assumed that at least two states of the
epileptic brain are possible: the interictal state characterized by a
normal apparently random, steady-state EEG ongoing activity; and
the ictal state that is characterized by paroxysmal occurrence of
synchronous oscillations and is generally called in neurology, a
seizure.
The spatial and temporal dynamics of the epileptogenic process is
still not clear completely especially the most challenging aspects of
epileptology which is the anticipation of the seizure. Despite all the
efforts we still don-t know how and when and why the seizure
occurs. However actual studies bring strong evidence that the
interictal-ictal state transition is not an abrupt phenomena. Findings
also indicate that it is possible to detect a preseizure phase.
Our approach is to use the neural network tool to detect interictal
states and to predict from those states the upcoming seizure ( ictal
state). Analysis of the EEG signal based on neural networks is used
for the classification of EEG as either seizure or non-seizure. By
applying prediction methods it will be possible to predict the
upcoming seizure from non-seizure EEG.
We will study the patients admitted to the epilepsy monitoring
unit for the purpose of recording their seizures. Preictal, ictal, and
post ictal EEG recordings are available on such patients for analysis
The system will be induced by taking a body of samples then
validate it using another. Distinct from the two first ones a third body
of samples is taken to test the network for the achievement of
optimum prediction. Several methods will be tried 'Backpropagation
ANN' and 'RBF'.
Abstract: An application framework provides a reusable design
and implementation for a family of software systems. Frameworks
are introduced to reduce the cost of a product line (i.e., a family of
products that shares the common features). Software testing is a timeconsuming
and costly ongoing activity during the application
software development process. Generating reusable test cases for the
framework applications during the framework development stage,
and providing and using the test cases to test part of the framework
application whenever the framework is used reduces the application
development time and cost considerably. This paper introduces the
Framework Interface State Transition Tester (FIST2), a tool for
automated unit testing of Java framework applications. During the
framework development stage, given the formal descriptions of the
framework hooks, the specifications of the methods of the
framework-s extensible classes, and the illegal behavior description
of the Framework Interface Classes (FICs), FIST2 generates unitlevel
test cases for the classes. At the framework application
development stage, given the customized method specifications of
the implemented FICs, FIST2 automates the use, execution, and
evaluation of the already generated test cases to test the implemented
FICs. The paper illustrates the use of the FIST2 tool for testing
several applications that use the SalesPoint framework.
Abstract: Although achieving zero-defect software release is
practically impossible, software industries should take maximum
care to detect defects/bugs well ahead in time allowing only bare
minimums to creep into released version. This is a clear indicator of
time playing an important role in the bug detection. In addition to
this, software quality is the major factor in software engineering
process. Moreover, early detection can be achieved only through
static code analysis as opposed to conventional testing.
BugCatcher.Net is a static analysis tool, which detects bugs in .NET®
languages through MSIL (Microsoft Intermediate Language)
inspection. The tool utilizes a Parser based on Finite State Automata
to carry out bug detection. After being detected, bugs need to be
corrected immediately. BugCatcher.Net facilitates correction, by
proposing a corrective solution for reported warnings/bugs to end
users with minimum side effects. Moreover, the tool is also capable
of analyzing the bug trend of a program under inspection.