Library Aware Power Conscious Realization of Complementary Boolean Functions

In this paper, we consider the problem of logic simplification for a special class of logic functions, namely complementary Boolean functions (CBF), targeting low power implementation using static CMOS logic style. The functions are uniquely characterized by the presence of terms, where for a canonical binary 2-tuple, D(mj) ∪ D(mk) = { } and therefore, we have | D(mj) ∪ D(mk) | = 0 [19]. Similarly, D(Mj) ∪ D(Mk) = { } and hence | D(Mj) ∪ D(Mk) | = 0. Here, 'mk' and 'Mk' represent a minterm and maxterm respectively. We compare the circuits minimized with our proposed method with those corresponding to factored Reed-Muller (f-RM) form, factored Pseudo Kronecker Reed-Muller (f-PKRM) form, and factored Generalized Reed-Muller (f-GRM) form. We have opted for algebraic factorization of the Reed-Muller (RM) form and its different variants, using the factorization rules of [1], as it is simple and requires much less CPU execution time compared to Boolean factorization operations. This technique has enabled us to greatly reduce the literal count as well as the gate count needed for such RM realizations, which are generally prone to consuming more cells and subsequently more power consumption. However, this leads to a drawback in terms of the design-for-test attribute associated with the various RM forms. Though we still preserve the definition of those forms viz. realizing such functionality with only select types of logic gates (AND gate and XOR gate), the structural integrity of the logic levels is not preserved. This would consequently alter the testability properties of such circuits i.e. it may increase/decrease/maintain the same number of test input vectors needed for their exhaustive testability, subsequently affecting their generalized test vector computation. We do not consider the issue of design-for-testability here, but, instead focus on the power consumption of the final logic implementation, after realization with a conventional CMOS process technology (0.35 micron TSMC process). The quality of the resulting circuits evaluated on the basis of an established cost metric viz., power consumption, demonstrate average savings by 26.79% for the samples considered in this work, besides reduction in number of gates and input literals by 39.66% and 12.98% respectively, in comparison with other factored RM forms.

Supporting QoS-aware Multicasting in Differentiated Service Networks

A scalable QoS aware multicast deployment in DiffServ networks has become an important research dimension in recent years. Although multicasting and differentiated services are two complementary technologies, the integration of the two technologies is a non-trivial task due to architectural conflicts between them. A popular solution proposed is to extend the functionality of the DiffServ components to support multicasting. In this paper, we propose an algorithm to construct an efficient QoSdriven multicast tree, taking into account the available bandwidth per service class. We also present an efficient way to provision the limited available bandwidth for supporting heterogeneous users. The proposed mechanism is evaluated using simulated tests. The simulated result reveals that our algorithm can effectively minimize the bandwidth use and transmission cost

Silicon-based Low-Power Reconfigurable Optical Add-Drop Multiplexer (ROADM)

We demonstrate a 1×4 coarse wavelength division-multiplexing (CWDM) planar concave grating multiplexer/demultiplexer and its application in re-configurable optical add/drop multiplexer (ROADM) system in silicon-on-insulator substrate. The wavelengths of the demonstrated concave grating multiplexer align well with the ITU-T standard. We demonstrate a prototype of ROADM comprising two such concave gratings and four wide-band thermo-optical MZI switches. Undercut technology which removes the underneath silicon substrate is adopted in optical switches in order to minimize the operation power. For all the thermal heaters, the operation voltage is smaller than 1.5 V, and the switch power is ~2.4 mW. High throughput pseudorandom binary sequence (PRBS) data transmission with up to 100 Gb/s is demonstrated, showing the high-performance ROADM functionality.

Representing Uncertainty in Computer-Generated Forces

The Integrated Performance Modelling Environment (IPME) is a powerful simulation engine for task simulation and performance analysis. However, it has no high level cognition such as memory and reasoning for complex simulation. This article introduces a knowledge representation and reasoning scheme that can accommodate uncertainty in simulations of military personnel with IPME. This approach demonstrates how advanced reasoning models that support similarity-based associative process, rule-based abstract process, multiple reasoning methods and real-time interaction can be integrated with conventional task network modelling to provide greater functionality and flexibility when modelling operator performance.

A Control Strategy Based on UTT and ISCT for 3P4W UPQC

This paper presents a novel control strategy of a threephase four-wire Unified Power Quality (UPQC) for an improvement in power quality. The UPQC is realized by integration of series and shunt active power filters (APFs) sharing a common dc bus capacitor. The shunt APF is realized using a thee-phase, four leg voltage source inverter (VSI) and the series APF is realized using a three-phase, three leg VSI. A control technique based on unit vector template technique (UTT) is used to get the reference signals for series APF, while instantaneous sequence component theory (ISCT) is used for the control of Shunt APF. The performance of the implemented control algorithm is evaluated in terms of power-factor correction, load balancing, neutral source current mitigation and mitigation of voltage and current harmonics, voltage sag and swell in a three-phase four-wire distribution system for different combination of linear and non-linear loads. In this proposed control scheme of UPQC, the current/voltage control is applied over the fundamental supply currents/voltages instead of fast changing APFs currents/voltages, there by reducing the computational delay and the required sensors. MATLAB/Simulink based simulations are obtained, which support the functionality of the UPQC. MATLAB/Simulink based simulations are obtained, which support the functionality of the UPQC.