DJess A Knowledge-Sharing Middleware to Deploy Distributed Inference Systems

In this paper DJess is presented, a novel distributed production system that provides an infrastructure for factual and procedural knowledge sharing. DJess is a Java package that provides programmers with a lightweight middleware by which inference systems implemented in Jess and running on different nodes of a network can communicate. Communication and coordination among inference systems (agents) is achieved through the ability of each agent to transparently and asynchronously reason on inferred knowledge (facts) that might be collected and asserted by other agents on the basis of inference code (rules) that might be either local or transmitted by any node to any other node.

Self-efficacy, Self-reliance, and Motivation inan Asynchronous Learning Environment

Self-efficacy, self-reliance, and motivation were examined in a quasi-experimental study with 178 sophomore university students. Participants used an interactive cardiovascular anatomy and physiology CD-ROM, and completed a 15-item questionnaire. Reliability of the questionnaire was established using Cronbach-s alpha. Post-tests and course grades were examined using a t-test, demonstrating no significance. Results of an item-to-item analysis of the questionnaire showed overall satisfaction with the teaching methodology and varied results for self-efficacy, selfreliance, and motivation. Kendall-s Tau was calculated for all items in the questionnaire.

Software Architecture and Support for Patient Tracking Systems in Critical Scenarios

In this work a new platform for mobile-health systems is presented. System target application is providing decision support to rescue corps or military medical personnel in combat areas. Software architecture relies on a distributed client-server system that manages a wireless ad-hoc networks hierarchy in which several different types of client operate. Each client is characterized for different hardware and software requirements. Lower hierarchy levels rely in a network of completely custom devices that store clinical information and patient status and are designed to form an ad-hoc network operating in the 2.4 GHz ISM band and complying with the IEEE 802.15.4 standard (ZigBee). Medical personnel may interact with such devices, that are called MICs (Medical Information Carriers), by means of a PDA (Personal Digital Assistant) or a MDA (Medical Digital Assistant), and transmit the information stored in their local databases as well as issue a service request to the upper hierarchy levels by using IEEE 802.11 a/b/g standard (WiFi). The server acts as a repository that stores both medical evacuation forms and associated events (e.g., a teleconsulting request). All the actors participating in the diagnostic or evacuation process may access asynchronously to such repository and update its content or generate new events. The designed system pretends to optimise and improve information spreading and flow among all the system components with the aim of improving both diagnostic quality and evacuation process.

Performance Analysis of QS-CDMA Systems

In the paper, the performance of quasi-synchronous CDMA (QS-CDMA) system, which can allow an increased timing error in synchronized access, is discussed. Average BER performance of the system is analyzed in the condition of different access timing error and different asynchronous users by simulation in AWGN channel. The results show that QS-CDMA system is shown to have great performance gain over the asynchronous system when access timing error is within a few chips and asynchronous users is tolerable. However, with access timing error increasing and asynchronous users increasing, the performance of QS-CDMA will degrade. Also, we can determine the number of tolerable asynchronous users for different access timing error by simulation figures.

Asynchronous Parallel Distributed Genetic Algorithm with Elite Migration

In most of the popular implementation of Parallel GAs the whole population is divided into a set of subpopulations, each subpopulation executes GA independently and some individuals are migrated at fixed intervals on a ring topology. In these studies, the migrations usually occur 'synchronously' among subpopulations. Therefore, CPUs are not used efficiently and the communication do not occur efficiently either. A few studies tried asynchronous migration but it is hard to implement and setting proper parameter values is difficult. The aim of our research is to develop a migration method which is easy to implement, which is easy to set parameter values, and which reduces communication traffic. In this paper, we propose a traffic reduction method for the Asynchronous Parallel Distributed GA by migration of elites only. This is a Server-Client model. Every client executes GA on a subpopulation and sends an elite information to the server. The server manages the elite information of each client and the migrations occur according to the evolution of sub-population in a client. This facilitates the reduction in communication traffic. To evaluate our proposed model, we apply it to many function optimization problems. We confirm that our proposed method performs as well as current methods, the communication traffic is less, and setting of the parameters are much easier.

Integration of Fixed and Variable Speed Wind Generator Dynamics with Multimachine AC Systems

The impact of fixed speed squirrel cage type as well as variable speed doubly fed induction generators (DFIG) on dynamic performance of a multimachine power system has been investigated. Detailed models of the various components have been presented and the integration of asynchronous and synchronous generators has been carried out through a rotor angle based transform. Simulation studies carried out considering the conventional dynamic model of squirrel cage asynchronous generators show that integration, as such, could degrade to the AC system performance transiently. This article proposes a frequency or power controller which can effectively control the transients and restore normal operation of fixed speed induction generator quickly. Comparison of simulation results between classical cage and doubly-fed induction generators indicate that the doubly fed induction machine is more adaptable to multimachine AC system. Frequency controller installed in the DFIG system can also improve its transient profile.

Semi-Blind Two-Dimensional Code Acquisition in CDMA Communications

In this paper, we propose a new algorithm for joint time-delay and direction-of-arrival (DOA) estimation, here called two-dimensional code acquisition, in an asynchronous directsequence code-division multiple-access (DS-CDMA) array system. This algorithm depends on eigenvector-eigenvalue decomposition of sample correlation matrix, and requires to know desired user-s training sequence. The performance of the algorithm is analyzed both analytically and numerically in uncorrelated and coherent multipath environment. Numerical examples show that the algorithm is robust with unknown number of coherent signals.

On the Continuous Service of Distributed e-Learning System

In this paper, backup and recovery technique for Peer to Peer applications, such as a distributed asynchronous Web-Based Training system that we have previously proposed. In order to improve the scalability and robustness of this system, all contents and function are realized on mobile agents. These agents are distributed to computers, and they can obtain using a Peer to Peer network that modified Content-Addressable Network. In the proposed system, although entire services do not become impossible even if some computers break down, the problem that contents disappear occurs with an agent-s disappearance. As a solution for this issue, backups of agents are distributed to computers. If a failure of a computer is detected, other computers will continue service using backups of the agents belonged to the computer.

Asynchronous Microcontroller Simulation Model in VHDL

This article describes design of the 8-bit asynchronous microcontroller simulation model in VHDL. The model is created in ISE Foundation design tool and simulated in Modelsim tool. This model is a simple application example of asynchronous systems designed in synchronous design tools. The design process of creating asynchronous system with 4-phase bundled-data protocol and with matching delays is described in the article. The model is described in gate-level abstraction. The simulation waveform of the functional construction is the result of this article. Described construction covers only the simulation model. The next step would be creating synthesizable model to FPGA.

Distributed e-Learning System with Client-Server and P2P Hybrid Architecture

We have developed a distributed asynchronous Web based training system. In order to improve the scalability and robustness of this system, all contents and a function are realized on mobile agents. These agents are distributed to computers, and they can use a Peer to Peer network that modified Content-Addressable Network. In this system, all computers offer the function and exercise by themselves. However, the system that all computers do the same behavior is not realistic. In this paper, as a solution of this issue, we present an e-Learning system that is composed of computers of different participation types. Enabling the computer of different participation types will improve the convenience of the system.

A New Digital Transceiver Circuit for Asynchronous Communication

A new digital transceiver circuit for asynchronous frame detection is proposed where both the transmitter and receiver contain all digital components, thereby avoiding possible use of conventional devices like monostable multivibrators with unstable external components such as resistances and capacitances. The proposed receiver circuit, in particular, uses a combinational logic block yielding an output which changes its state as soon as the start bit of a new frame is detected. This, in turn, helps in generating an efficient receiver sampling clock. A data latching circuit is also used in the receiver to latch the recovered data bits in any new frame. The proposed receiver structure is also extended from 4- bit information to any general n data bits within a frame with a common expression for the output of the combinational logic block. Performance of the proposed hardware design is evaluated in terms of time delay, reliability and robustness in comparison with the standard schemes using monostable multivibrators. It is observed from hardware implementation that the proposed circuit achieves almost 33 percent speed up over any conventional circuit.