Low Power Approach for Decimation Filter Hardware Realization

There are multiple ways to implement a decimator filter. This paper addresses usage of CIC (cascaded-integrator-comb) filter and HB (half band) filter as the decimator filter to reduce the frequency sample rate by factor of 64 and detail of the implementation step to realize this design in hardware. Low power design approach for CIC filter and half band filter will be discussed. The filter design is implemented through MATLAB system modeling, ASIC (application specific integrated circuit) design flow and verified using a FPGA (field programmable gate array) board and MATLAB analysis.

Digital Power Management Hardware Realization Using FPGA

This paper describes design of a digital feedback loop for a low switching frequency dc-dc switching converters. Low switching frequencies were selected in this design. A look up table for the digital PID (proportional integrator differentiator) compensator was implemented using Altera Stratix II with built-in ADC (analog-to-digital converter) to achieve this hardware realization. Design guidelines are given for the PID compensator, high frequency DPWM (digital pulse width modulator) and moving average filter.

Wireless Healthcare Monitoring System for Home

A healthcare monitoring system is presented in this paper. This system is based on ultra-low power sensor nodes and a personal server, which is based on hardware and software extensions to a Personal Digital Assistant (PDA)/Smartphone. The sensor node collects data from the body of a patient and sends it to the personal server where the data is processed, displayed and made ready to be sent to a healthcare network, if necessary. The personal server consists of a compact low power receiver module and equipped with a Smartphone software. The receiver module takes less than 30 × 30 mm board size and consumes approximately 25 mA in active mode.