Digital Power Management Hardware Realization Using FPGA

This paper describes design of a digital feedback loop for a low switching frequency dc-dc switching converters. Low switching frequencies were selected in this design. A look up table for the digital PID (proportional integrator differentiator) compensator was implemented using Altera Stratix II with built-in ADC (analog-to-digital converter) to achieve this hardware realization. Design guidelines are given for the PID compensator, high frequency DPWM (digital pulse width modulator) and moving average filter.

Authors:

• Kar Foo Chong
• Andreas Lee Astuti
• Pradeep K. Gopalakrishnan
• T. Hui Teo

Keywords:

• dc-dc converter
• FPGA
• PID
• power management
• .

References:

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on look-up tables for control of high-frequency dc-dc
Converters,".Proceedings of 2002 IEEE Workshop on Computers in
Power Electronics, pp. 18-22, June 2002.
[2] T.W. Martin and S.S Ang, "Digital control of switching converters,"
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[3] A. Prodic, D. Maksimovic and R.W. Erickson "Design and
implementation of a digital PWM controller for a high-frequency switch
dc-dc power converters", The 27th annual Conference of the IEEE
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