Abstract: In this paper, a uniform calculus-based approach for
synthesizing monitors checking correctness properties specified by a
large variety of logics at runtime is provided, including future and past
time logics, interval logics, state machine and parameterized temporal
logics. We present a calculus mechanism to synthesize monitors from
the logical specification for the incremental analysis of execution
traces during test and real run. The monitor detects both good and bad
prefix of a particular kind, namely those that are informative for the
property under investigation. We elaborate the procedure of calculus
as monitors.