Abstract: In Image processing the Image compression can improve
the performance of the digital systems by reducing the cost and
time in image storage and transmission without significant reduction
of the Image quality. This paper describes hardware architecture of
low complexity Discrete Cosine Transform (DCT) architecture for
image compression[6]. In this DCT architecture, common computations
are identified and shared to remove redundant computations
in DCT matrix operation. Vector processing is a method used for
implementation of DCT. This reduction in computational complexity
of 2D DCT reduces power consumption. The 2D DCT is performed
on 8x8 matrix using two 1-Dimensional Discrete cosine transform
blocks and a transposition memory [7]. Inverse discrete cosine
transform (IDCT) is performed to obtain the image matrix and
reconstruct the original image. The proposed image compression
algorithm is comprehended using MATLAB code. The VLSI design
of the architecture is implemented Using Verilog HDL. The proposed
hardware architecture for image compression employing DCT was
synthesized using RTL complier and it was mapped using 180nm
standard cells. . The Simulation is done using Modelsim. The
simulation results from MATLAB and Verilog HDL are compared.
Detailed analysis for power and area was done using RTL compiler
from CADENCE. Power consumption of DCT core is reduced to
1.027mW with minimum area[1].
Abstract: The Minimal Residual (MR) is modified for adaptive
filtering application. Three forms of MR based algorithm are
presented: i) the low complexity SPCG, ii) MREDSI, and iii)
MREDSII. The low complexity is a reduced complexity version of a
previously proposed SPCG algorithm. Approximations introduced
reduce the algorithm to an LMS type algorithm, but, maintain the
superior convergence of the SPCG algorithm. Both MREDSI and
MREDSII are MR based methods with Euclidean direction of search.
The choice of Euclidean directions is shown via simulation to give
better misadjustment compared to their gradient search counterparts.
Abstract: A new method for low complexity image coding is presented, that permits different settings and great scalability in the generation of the final bit stream. This coding presents a continuoustone still image compression system that groups loss and lossless compression making use of finite arithmetic reversible transforms. Both transformation in the space of color and wavelet transformation are reversible. The transformed coefficients are coded by means of a coding system in depending on a subdivision into smaller components (CFDS) similar to the bit importance codification. The subcomponents so obtained are reordered by means of a highly configure alignment system depending on the application that makes possible the re-configure of the elements of the image and obtaining different levels of importance from which the bit stream will be generated. The subcomponents of each level of importance are coded using a variable length entropy coding system (VBLm) that permits the generation of an embedded bit stream. This bit stream supposes itself a bit stream that codes a compressed still image. However, the use of a packing system on the bit stream after the VBLm allows the realization of a final highly scalable bit stream from a basic image level and one or several enhance levels.
Abstract: We present a novel scheme to evaluate sinusoidal functions with low complexity and high precision using cubic spline interpolation. To this end, two different approaches are proposed to find the interpolating polynomial of sin(x) within the range [- π , π]. The first one deals with only a single data point while the other with two to keep the realization cost as low as possible. An approximation error optimization technique for cubic spline interpolation is introduced next and is shown to increase the interpolator accuracy without increasing complexity of the associated hardware. The architectures for the proposed approaches are also developed, which exhibit flexibility of implementation with low power requirement.
Abstract: LDPC codes could be used in magnetic storage devices because of their better decoding performance compared to other error correction codes. However, their hardware implementation results in large and complex decoders. This one of the main obstacles the decoders to be incorporated in magnetic storage devices. We construct small high girth and rate 2 columnweight codes from cage graphs. Though these codes have low performance compared to higher column weight codes, they are easier to implement. The ease of implementation makes them more suitable for applications such as magnetic recording. Cages are the smallest known regular distance graphs, which give us the smallest known column-weight 2 codes given the size, girth and rate of the code.
Abstract: This paper proposes an efficient lattice-reduction-aided
detection (LRD) scheme to improve the detection performance of
MIMO-OFDM system. In this proposed scheme, V candidate symbols
are considered at the first layer, and V probable streams are
detected with LRD scheme according to the first detected V candidate
symbols. Then, the most probable stream is selected through a ML
test. Since the proposed scheme can more accurately detect initial
symbol and can reduce transmission of error to rest symbols, the
proposed scheme shows more improved performance than conventional
LRD with very low complexity.
Abstract: Ad hoc networks are characterized by multi-hop
wireless connectivity and frequently changing network topology.
Forming security association among a group of nodes in ad-hoc
networks is more challenging than in conventional networks due to the
lack of central authority, i.e. fixed infrastructure. With that view in
mind, group key management plays an important building block of
any secure group communication. The main contribution of this paper
is a low complexity key management scheme that is suitable for fully
self-organized ad-hoc networks. The protocol is also password
authenticated, making it resilient against active attacks. Unlike other
existing key agreement protocols, ours make no assumption about the
structure of the underlying wireless network, making it suitable for
“truly ad-hoc" networks. Finally, we will analyze our protocol to show
the computation and communication burden on individual nodes for
key establishment.
Abstract: This paper suggests an improved integer frequency
offset (IFO) estimation scheme using P1 symbol for orthogonal
frequency division multiplexing (OFDM) based the second generation
terrestrial digital video broadcasting (DVB-T2) system. Proposed
IFO estimator is designed by a low-complexity blind IFO estimation
scheme, which is implemented with complex additions. Also, we
propose active carriers (ACs) selection scheme in order to prevent
performance degradation in blind IFO estimation. The simulation
results show that under the AWGN and TU6 channels, the proposed
method has low complexity than conventional method and almost
similar performance in comparison with the conventional method.