Abstract: A novel and efficient approach to realize
fractional-order capacitors is investigated in this paper. Meanwhile, a
new approach which is more efficient for semiconductor
implementation of fractional-order capacitors is proposed. The
feasibility of the approach has been verified with the preliminary
measured results.
Abstract: A new power regulator controller with multiple-access
PID compensator is proposed, which can achieve a minimum memory
requirement for fully table look-up. The proposed regulator controller
employs hysteresis comparators, an error process unit (EPU) for
voltage regulation, a multiple-access PID compensator and a lowpower-
consumption digital PWM (DPWM). Based on the multipleaccess
mechanism, the proposed controller can alleviate the penalty of
large amount of memory employed for fully table look-up based PID
compensator in the applications of power regulation. The proposed
controller has been validated with simulation results.