Abstract: With rapid technology scaling, the proportion of the
static power consumption catches up with dynamic power
consumption gradually. To decrease leakage consumption is
becoming more and more important in low-power design. This paper
presents a power-gating scheme for P-DTGAL (p-type dual
transmission gate adiabatic logic) circuits to reduce leakage power
dissipations under deep submicron process. The energy dissipations of
P-DTGAL circuits with power-gating scheme are investigated in
different processes, frequencies and active ratios. BSIM4 model is
adopted to reflect the characteristics of the leakage currents. HSPICE
simulations show that the leakage loss is greatly reduced by using the
P-DTGAL with power-gating techniques.