Abstract: A simple approach is demonstrated for growing large
scale, nearly vertically aligned ZnO nanowire arrays by thermal
oxidation method. To reveal effect of temperature on growth and
physical properties of the ZnO nanowires, gold coated zinc substrates
were annealed at 300 °C and 400 °C for 4 hours duration in air. Xray
diffraction patterns of annealed samples indicated a set of well
defined diffraction peaks, indexed to the wurtzite hexagonal phase of
ZnO. The scanning electron microscopy studies show formation of
ZnO nanowires having length of several microns and average of
diameter less than 500 nm. It is found that the areal density of wires
is relatively higher, when the annealing is carried out at higher
temperature i.e. at 400°C. From the field emission studies, the values
of the turn-on and threshold field, required to draw emission current
density of 10 μA/cm2 and 100 μA/cm2 are observed to be 1.2 V/μm
and 1.7 V/μm for the samples annealed at 300 °C and 2.9 V/μm and
3.7 V/μm for that annealed at 400 °C, respectively. The field
emission current stability, investigated over duration of more than 2
hours at the preset value of 1 μA, is found to be fairly good in both
cases. The simplicity of the synthesis route coupled with the
promising field emission properties offer unprecedented advantage
for the use of ZnO field emitters for high current density
applications.
Abstract: Nanowire arrays of copper with uniform diameters have
been synthesized by potentiostatic electrochemical metal deposition
(EMD) of copper sulphate and potassium chloride solution within
the nano-channels of porous Indium-Tin Oxide (ITO), also known as
Tin doped Indium Oxide templates. The nanowires developed were
fairly continuous with diameters ranging from 110-140 nm along
the entire length. Single as well as poly-crystalline copper wires
have been prepared by application of appropriate potential during the
EMD process. Scanning electron microscopy (SEM), high resolution
transmission electron microscopy (HRTEM), small angle electron
diffraction (SAED) and atomic force microscopy (AFM) were used
to characterize the synthesized nano wires at room temperature. The
electrochemical response of synthesized products was evaluated by
cyclic voltammetry while surface energy analysis was carried out
using a Goniometer.
Abstract: We have developed an analytic model for the radial pn-junction in a nanowire (NW) core-shell structure utilizing as a new
building block in different semiconductor devices. The potential distribution through the p-n-junction is calculated and the analytical expressions are derived to compute the depletion region widths. We
show that the widths of space charge layers, surrounding the core, are
the functions of core radius, which is the manifestation of so called classical size effect. The relationship between the depletion layer width and the built-in potential in the asymptotes of infinitely large
core radius transforms to square-root dependence specific for conventional planar p-n-junctions. The explicit equation is derived to
compute the capacitance of radial p-n-junction. The current-voltage behavior is also carefully determined taking into account the “short
base" effects.
Abstract: A facile vapour deposition method of synthesis of vertically aligned ZnO nanowires on carbon seed layer was developed. The received samples were investigated on electronic microscope JSM-6490 LA JEOL and x-ray diffractometer X, pert MPD PRO. The photoluminescence spectra (PL) of obtained ZnO samples at a room temperature were studied using He-Cd laser (325 nm line) as excitation source.
Abstract: ZnO nanostructures including nanowires, nanorods,
and nanoneedles were successfully deposited on GaAs substrates,
respectively, by simple two-step chemical method for the first time. A
ZnO seed layer was firstly pre-coated on the O2-plasma treated
substrate by sol-gel process, followed by the nucleation of ZnO
nanostructures through hydrothermal synthesis. Nanostructures with
different average diameter (15-250 nm), length (0.9-1.8 μm), density
(0.9-16×109 cm-2) were obtained via adjusting the growth time and
concentration of precursors. From the reflectivity spectra, we
concluded ordered and taper nanostructures were preferential for
photovoltaic applications. ZnO nanoneedles with an average diameter
of 106 nm, a moderate length of 2.4 μm, and the density of 7.2×109
cm-2 could be synthesized in the concentration of 0.04 M for 18 h.
Integrated with the nanoneedle array, the power conversion efficiency
of single junction solar cell was increased from 7.3 to 12.2%,
corresponding to a 67% improvement.
Abstract: In this paper, we present a vertical wire NMOS
device fabricated using CMOS compatible processes. The
impact of temperature on various device parameters is
investigated in view of usual increase in surrounding
temperature with device density.
Abstract: The aim of this research was to calculate the thermal
properties of Au3Ni Nanowire. The molecular dynamics (MD)
simulation technique was used to obtain the effect of radius size on
the energy, the melting temperature and the latent heat of fusion at
the isobaric-isothermal (NPT) ensemble. The Quantum Sutton-Chen
(Q-SC) many body interatomic potentials energy have been used for
Gold (Au) and Nickel (Ni) elements and a mixing rule has been
devised to obtain the parameters of these potentials for nanowire
stats. Our MD simulation results show the melting temperature and
latent heat of fusion increase upon increasing diameter of nanowire.
Moreover, the cohesive energy decreased with increasing diameter of
nanowire.
Abstract: Vertical ZnO nanowire array films were synthesized
based on aqueous method for sensing applications. ZnO nanowires
were investigated structurally using X-ray diffraction (XRD) and
scanning electron microscopy (SEM). The gas-sensing properties of
ZnO nanowires array films are studied. It is found that the ZnO
nanowires array film sensor exhibits excellent sensing properties
towards O2 and CO2 at 100 °C with the response time shorter than 5
s. High surface area / volume ratio of vertical ZnO nanowire and high
mobility accounts for the fast response and recovery. The sensor
response was measured in the range from 100 to 500 ppm O2 and CO2
in this study.
Abstract: We report the size dependence of 1D superconductivity in ultrathin (10-130 nm) nanowires produced by coating suspended carbon nanotubes with a superconducting NbN thin film. The resistance-temperature characteristic curves for samples with ≧25 nm wire width show the superconducting transition. On the other hand, for the samples with 10-nm width, the superconducting transition is not exhibited owing to the quantum size effect. The differential resistance vs. current density characteristic curves show some peak, indicating that Josephson junctions are formed in nanowires. The presence of the Josephson junctions is well explained by the measurement of the magnetic field dependence of the critical current. These understanding allow for the further expansion of the potential application of NbN, which is utilized for single photon detectors and so on.
Abstract: In this paper, we present a vertical nanowire thin film transistor with gate-all-around architecture, fabricated using CMOS compatible processes. A novel method of fabricating polysilicon vertical nanowires of diameter as small as 30 nm using wet-etch is presented. Both n-type and p-type vertical poly-silicon nanowire transistors exhibit superior electrical characteristics as compared to planar devices. On a poly-crystalline nanowire of 30 nm diameter, high Ion/Ioff ratio of 106, low drain-induced barrier lowering (DIBL) of 50 mV/V, and low sub-threshold slope SS~100mV/dec are demonstrated for a device with channel length of 100 nm.
Abstract: ZnO heteronanostructured nanowires arrays have
been fabricated by low temperature solution method. Various
heterostructures were synthesized including CdS/ZnO,
CdSe/CdS/ZnO nanowires and Co3O4/ZnO, ZnO/SiC
nanowires. These multifunctional heterostructure nanowires
showed important applications in photocatalysts, sensors,
wettability control and solar energy conversion.
Abstract: In this paper we investigate the electrical
characteristics of a new structure of gate all around strained silicon
nanowire field effect transistors (FETs) with dual dielectrics by
changing the radius (RSiGe) of silicon-germanium (SiGe) wire and
gate dielectric. Indeed the effect of high-κ dielectric on Field Induced
Barrier Lowering (FIBL) has been studied. Due to the higher electron
mobility in tensile strained silicon, the n-type FETs with strained
silicon channel have better drain current compare with the pure Si
one. In this structure gate dielectric divided in two parts, we have
used high-κ dielectric near the source and low-κ dielectric near the
drain to reduce the short channel effects. By this structure short
channel effects such as FIBL will be reduced indeed by increasing
the RSiGe, ID-VD characteristics will be improved. The leakage
current and transfer characteristics, the threshold-voltage (Vt), the
drain induced barrier height lowering (DIBL), are estimated with
respect to, gate bias (VG), RSiGe and different gate dielectrics. For
short channel effects, such as DIBL, gate all around strained silicon
nanowire FET have similar characteristics with the pure Si one while
dual dielectrics can improve short channel effects in this structure.
Abstract: Post growth annealing of solution grown ZnO
nanowire array is performed under controlled oxygen ambience. The
role of annealing over surface defects and their consequence on
dark/photo-conductivity and photosensitivity of nanowire array is
investigated. Surface defect properties are explored using various
measurement tools such as contact angle, photoluminescence, Raman
spectroscopy and XPS measurements. The contact angle of the NW
films reduces due to oxygen annealing and nanowire film surface
changes from hydrophobic (96°) to hydrophilic (16°). Raman and
XPS spectroscopy reveal that oxygen annealing improves the crystal
quality of the nanowire films. The defect band emission intensity
(relative to band edge emission, ID/IUV) reduces from 1.3 to 0.2 after
annealing at 600 °C at 10 SCCM flow of oxygen. An order
enhancement in dark conductivity is observed in O2 annealed
samples, while photoconductivity is found to be slightly reduced due
to lower concentration of surface related oxygen defects.
Abstract: Silicon nanowire (SiNW) based thermoelectric device (TED) has potential applications in areas such as chip level cooling/ energy harvesting. It is a great challenge however, to assemble an efficient device with these SiNW. The presence of parasitic in the form of interfacial electrical resistance will have a significant impact on the performance of the TED. In this work, we explore the effect of the electrical contact resistance on the performance of a TED. Numerical simulations are performed on SiNW to investigate such effects on its cooling performance. Intrinsically, SiNW individually without the unwanted parasitic effect has excellent cooling power density. However, the cooling effect is undermined with the contribution of the electrical contact resistance.
Abstract: This paper presents the design of a ring-shaped tri-axial fore sensor that can be incorporated into the tip of a guidewire for use in minimally invasive surgery (MIS). The designed sensor comprises a ring-shaped structure located at the center of four cantilever beams. The ringdesign allows surgical tools to be easily passed through which largely simplified the integration process. Silicon nanowires (SiNWs) are used aspiezoresistive sensing elementsembeddedon the four cantilevers of the sensor to detect the resistance change caused by the applied load.An integration scheme with new designed guidewire tip structure having two coils at the distal end is presented. Finite element modeling has been employed in the sensor design to find the maximum stress location in order to put the SiNWs at the high stress regions to obtain maximum output. A maximum applicable force of 5 mN is found from modeling. The interaction mechanism between the designed sensor and a steel wire has been modeled by FEM. A linear relationship between the applied load on the steel wire and the induced stress on the SiNWs were observed.
Abstract: In this paper electrical characteristics of various kinds
of multiple-gate silicon nanowire transistors (SNWT) with the
channel length equal to 7 nm are compared. A fully ballistic quantum
mechanical transport approach based on NEGF was employed to
analyses electrical characteristics of rectangular and cylindrical
silicon nanowire transistors as well as a Double gate MOS FET. A
double gate, triple gate, and gate all around nano wires were studied
to investigate the impact of increasing the number of gates on the
control of the short channel effect which is important in nanoscale
devices. Also in the case of triple gate rectangular SNWT inserting
extra gates on the bottom of device can improve the application of
device. The results indicate that by using gate all around structures
short channel effects such as DIBL, subthreshold swing and delay
reduces.