Fairness and Quality of Service Issues and Analysis of IEEE 802.11e Wireless LAN

The IEEE 802.11e which is an enhanced version of the 802.11 WLAN standards incorporates the Quality of Service (QoS) which makes it a better choice for multimedia and real time applications. In this paper we study various aspects concerned with 802.11e standard. Further, the analysis results for this standard are compared with the legacy 802.11 standard. Simulation results show that IEEE 802.11e out performs legacy IEEE 802.11 in terms of quality of service due to its flow differentiated channel allocation and better queue management architecture. We also propose a method to improve the unfair allocation of bandwidth for downlink and uplink channels by varying the medium access priority level.

Optimal Control Strategy for High Performance EV Interior Permanent Magnet Synchronous Motor

The controllable electrical loss which consists of the copper loss and iron loss can be minimized by the optimal control of the armature current vector. The control algorithm of current vector minimizing the electrical loss is proposed and the optimal current vector can be decided according to the operating speed and the load conditions. The proposed control algorithm is applied to the experimental PM motor drive system and this paper presents a modern approach of speed control for permanent magnet synchronous motor (PMSM) applied for Electric Vehicle using a nonlinear control. The regulation algorithms are based on the feedback linearization technique. The direct component of the current is controlled to be zero which insures the maximum torque operation. The near unity power factor operation is also achieved. More over, among EV-s motor electric propulsion features, the energy efficiency is a basic characteristic that is influenced by vehicle dynamics and system architecture. For this reason, the EV dynamics are taken into account.

On-line Handwritten Character Recognition: An Implementation of Counterpropagation Neural Net

On-line handwritten scripts are usually dealt with pen tip traces from pen-down to pen-up positions. Time evaluation of the pen coordinates is also considered along with trajectory information. However, the data obtained needs a lot of preprocessing including filtering, smoothing, slant removing and size normalization before recognition process. Instead of doing such lengthy preprocessing, this paper presents a simple approach to extract the useful character information. This work evaluates the use of the counter- propagation neural network (CPN) and presents feature extraction mechanism in full detail to work with on-line handwriting recognition. The obtained recognition rates were 60% to 94% using the CPN for different sets of character samples. This paper also describes a performance study in which a recognition mechanism with multiple thresholds is evaluated for counter-propagation architecture. The results indicate that the application of multiple thresholds has significant effect on recognition mechanism. The method is applicable for off-line character recognition as well. The technique is tested for upper-case English alphabets for a number of different styles from different peoples.

A Security Analysis for Home Gateway Architectures

Providing Services at Home has become over the last few years a very dynamic and promising technological domain. It is likely to enable wide dissemination of secure and automated living environments. We propose a methodology for identifying threats to Services at Home Delivery systems, as well as a threat analysis of a multi-provider Home Gateway architecture. This methodology is based on a dichotomous positive/preventive study of the target system: it aims at identifying both what the system must do, and what it must not do. This approach completes existing methods with a synthetic view of potential security flaws, thus enabling suitable measures to be taken into account. Security implications of the evolution of a given system become easier to deal with. A prototype is built based on the conclusions of this analysis.

Digital Predistorter with Pipelined Architecture Using CORDIC Processors

In a wireless communication system, a predistorter(PD) is often employed to alleviate nonlinear distortions due to operating a power amplifier near saturation, thereby improving the system performance and reducing the interference to adjacent channels. This paper presents a new adaptive polynomial digital predistorter(DPD). The proposed DPD uses Coordinate Rotation Digital Computing(CORDIC) processors and PD process by pipelined architecture. It is simpler and faster than conventional adaptive polynomial DPD. The performance of the proposed DPD is proved by MATLAB simulation.

Third Order Current-mode Quadrature Sinusoidal Oscillator with High Output Impedances

This article presents a current-mode quadrature oscillator using differential different current conveyor (DDCC) and voltage differencing transconductance amplifier (VDTA) as active elements. The proposed circuit is realized fro m a non-inverting lossless integrator and an inverting second order low-pass filter. The oscillation condition and oscillation frequency can be electronically/orthogonally controlled via input bias currents. The circuit description is very simple, consisting of merely 1 DDCC, 1 VDTA, 1 grounded resistor and 3 grounded capacitors. Using only grounded elements, the proposed circuit is then suitable for IC architecture. The proposed oscillator has high output impedance which is easy to cascade or dive the external load without the buffer devices. The PSPICE simulation results are depicted, and the given results agree well with the theoretical anticipation. The power consumption is approximately 1.76mW at ±1.25V supply voltages.

A Wireless Secure Remote Access Architecture Implementing Role Based Access Control: WiSeR

In this study, we propose a network architecture for providing secure access to information resources of enterprise network from remote locations in a wireless fashion. Our proposed architecture offers a very promising solution for organizations which are in need of a secure, flexible and cost-effective remote access methodology. Security of the proposed architecture is based on Virtual Private Network technology and a special role based access control mechanism with location and time constraints. The flexibility mainly comes from the use of Internet as the communication medium and cost-effectiveness is due to the possibility of in-house implementation of the proposed architecture.

A Semantic Assistant Agent for Digital Libraries

In this paper we present semantic assistant agent (SAA), an open source digital library agent which takes user query for finding information in the digital library and takes resources- metadata and stores it semantically. SAA uses Semantic Web to improve browsing and searching for resources in digital library. All metadata stored in the library are available in RDF format for querying and processing by SemanSreach which is a part of SAA architecture. The architecture includes a generic RDF-based model that represents relationships among objects and their components. Queries against these relationships are supported by an RDF triple store.

A Low-cost Reconfigurable Architecture for AES Algorithm

This paper proposes a low-cost reconfigurable architecture for AES algorithm. The proposed architecture separates SubBytes and MixColumns into two parallel data path, and supports different bit-width operation for this two data path. As a result, different number of S-box can be supported in this architecture. The throughput and power consumption can be adjusted by changing the number of S-box running in this design. Using the TSMC 0.18μm CMOS standard cell library, a very low-cost implementation of 7K Gates is obtained under 182MHz frequency. The maximum throughput is 360Mbps while using 4 S-Box simultaneously, and the minimum throughput is 114Mbps while only using 1 S-Box