Abstract: With getting older in the whole population, the
prevalence of stroke and its residual disability is getting higher and
higher recently in Taiwan. The functional electrical stimulation
cycling system (FESCS) is useful for hemiplegic patients. Because
that the muscle of stroke patients is under hybrid activation. The raw
electromyography (EMG) represents the residual muscle force of
stroke subject whereas the peak-to-peak of stimulus EMG indicates the
force enhancement benefiting from ES. It seems that EMG signals
could be used for a parameter of feedback control mechanism. So, we
design the feedback control protocol of FESCS, it includes
physiological signal recorder, FPGA biomedical module, DAC and
electrical stimulation circuit. Using the intensity of real-time EMG
signal obtained from patients, as a feedback control method for the
output voltage of FES-cycling system.
Abstract: A multi-board run-time reconfigurable (MRTR)
system for evolvable hardware (EHW) is introduced with the aim to
implement on hardware the bidirectional incremental evolution (BIE)
method. The main features of this digital intrinsic EHW solution rely
on the multi-board approach, the variable chromosome length
management and the partial configuration of the reconfigurable
circuit. These three features provide a high scalability to the solution.
The design has been written in VHDL with the concern of not being
platform dependant in order to keep a flexibility factor as high as
possible. This solution helps tackling the problem of evolving
complex task on digital configurable support.
Abstract: Vision-based intelligent vehicle applications often require large amounts of memory to handle video streaming and image processing, which in turn increases complexity of hardware and software. This paper presents an FPGA implement of a vision-based blind spot warning system. Using video frames, the information of the blind spot area turns into one-dimensional information. Analysis of the estimated entropy of image allows the detection of an object in time. This idea has been implemented in the XtremeDSP video starter kit. The blind spot warning system uses only 13% of its logic resources and 95k bits block memory, and its frame rate is over 30 frames per sec (fps).