Abstract: Binary Decision Diagrams (BDDs) are useful data
structures for symbolic Boolean manipulations. BDDs are used in
many tasks in VLSI/CAD, such as equivalence checking, property
checking, logic synthesis, and false paths. In this paper we describe a
new approach for the realization of a BDD package. To perform
manipulations of Boolean functions, the proposed approach does not
depend on the recursive synthesis operation of the IF-Then-Else
(ITE). Instead of using the ITE operation, the basic synthesis
algorithm is done using Boolean NOR operation.
Abstract: This paper analyzes the patterns of the Monte Carlo
data for a large number of variables and minterms, in order to
characterize the circuit path length behavior. We propose models
that are determined by training process of shortest path length
derived from a wide range of binary decision diagram (BDD)
simulations. The creation of the model was done use of feed forward
neural network (NN) modeling methodology. Experimental results
for ISCAS benchmark circuits show an RMS error of 0.102 for the
shortest path length complexity estimation predicted by the NN
model (NNM). Use of such a model can help reduce the time
complexity of very large scale integrated (VLSI) circuitries and
related computer-aided design (CAD) tools that use BDDs.