Uniform Overlapped Multi-Carrier PWM for a Six-Level Diode Clamped Inverter
Multi-level voltage source inverters offer several
advantages such as; derivation of a refined output voltage with
reduced total harmonic distortion (THD), reduction of voltage ratings
of the power semiconductor switching devices and also the reduced
electro-magnetic-interference problems etc. In this paper, new
carrier-overlapped phase-disposition or sub-harmonic sinusoidal
pulse width modulation (CO-PD-SPWM) and also the carrieroverlapped
phase-disposition space vector modulation (CO-PDSVPWM)
schemes for a six-level diode-clamped inverter topology
are proposed. The principle of the proposed PWM schemes is similar
to the conventional PD-PWM with a little deviation from it in the
sense that the triangular carriers are all overlapped. The overlapping
of the triangular carriers on one hand results in an increased number
of switchings, on the other hand this facilitates an improved spectral
performance of the output voltage. It is demonstrated through
simulation studies that the six-level diode-clamped inverter with the
use of CO-PD-SPWM and CO-PD-SVPWM proposed in this paper is
capable of generating multiple levels in its output voltage. The
advantages of the proposed PWM schemes can be derived to benefit,
especially at lower modulation indices of the inverter and hence this
aspect of the proposed PWM schemes can be well exploited in high
power applications requiring low speeds of operation of the drive.
[1] Akira Nabae, Isao Takahashi and Hirofumi Akagi, "A Neutral-Point
Clamped PWM Inverter", IEEE-Trans. on Ind. Appl. Vol.IA-17, No.5,
Sep/Oct 1981, pp.518-523.
[2] T.A.Maynard and Foch, "Imbricated cells multi-level voltage source
inverters for high power applications", EPE Journal, Vol.3, No.2, 1993,
pp.99-106.
[3] X.Yuan and I.Barbi "Fundamentals of a new diode clamping multilevel
inverter," IEEE Trans. Power Electronics., vol. 15, pp. 711, Jul. 2000.
[4] J.Rodriguez, J. S.Lai, and F.Z.Peng, "Multilevel Inverters: A Survey of
topologies, Controls, and Applications," IEEE Trans. on Ind.
Electronics, Vol 49, No.4, August 2002, pp.724 - 738.
[5] H.Stemmler, P.Guggenbach," Configurations of High-Power Voltage
Source Inverter Drives", Proc. EPE Conf., 1993, pp.7 - 14.
[6] V.T.Somasekhar and K.Gopakumar, "Three-level inverter configuration
cascading two-level inverters", IEE Proc. of Electr. Power Appl.,
Vol.150, No.3, May 2003, pp.245-254.
[7] J.Holtz, "Pulsewidth modulation- A survey", IEEE Trans. on Industrial
Electronics, Vol. 30, No. 5, Dec 1992, pp. 410-420.
[8] Dae-Woong Chung, Joohn-Sheok Kim and Seung-Ki Sul, "Unified
Voltage Modulation Technique for Real-Time Three-Phase Power
Conversion", IEEE-Trans. on Ind.Appl, Vol.34, No.2, March/April
1998, pp.374-380.
[9] B.P.McGrath, D.G.Holmes and T.Meynard, "Reduced PWM Harmonic
Distortion for Multilevel Inverters Operating over a Wide Modulation
Range", IEEE Trans. on Power Electronics, vol. 21, no.4, July 2006, pp.
941-949.
[10] G.Carrara, S.Gardella, M.Marchesoni, R.Salutari, G.Sciutto, "A New
Multilevel PWM Method: A Theoretical Analysis," IEEE Trans. on
Power Electronics, vol. 7, no. 3, July 1992, pp. 497-505.
[11] L.M.Tolbert, and T.G.Habetler, "Novel Multilevel Inverter Carrier-
Based PWM Method", IEEE-Trans. on Ind.Appl, Vol.35, No.5,
Sept./Oct 1999, pp.1098-1107.
[12] L.Li.D.Czarkowski, Y.Liu and P.Pillay, "Multilevel space vector PWM
technique based on phase-shift harmonic suppression," in Proc. IEEE
Annu. APEC Conf., 2000, Vol.1, pp. 535-541.
[13] B.P.McGrath and D.G.Holmes, "Multicarrier PWM strategies for
multilevel inverters", IEEE Trans. on Power Electronics, vol. 49, no.4,
Aug 2002, pp. 858-867.
[14] P.C.Loh, D.G.Holmes, Y.Fukuta and T.A.Lipo, "Reduced Common-
Mode Modulation Strategies for Cascaded Multilevel Inverters", IEEETrans.
on Ind.Appl, Vol.39, No.5, Sept./Oct 2003, pp.1386-1395.
[15] R.Naderi and A.Rahmati, "Phase-Shifted Carrier PWM Technique for
General Cascaded Inverters", IEEE Trans. on Power Electronics, vol.23,
no. 3, May 2008, pp. 1257-1269.
[1] Akira Nabae, Isao Takahashi and Hirofumi Akagi, "A Neutral-Point
Clamped PWM Inverter", IEEE-Trans. on Ind. Appl. Vol.IA-17, No.5,
Sep/Oct 1981, pp.518-523.
[2] T.A.Maynard and Foch, "Imbricated cells multi-level voltage source
inverters for high power applications", EPE Journal, Vol.3, No.2, 1993,
pp.99-106.
[3] X.Yuan and I.Barbi "Fundamentals of a new diode clamping multilevel
inverter," IEEE Trans. Power Electronics., vol. 15, pp. 711, Jul. 2000.
[4] J.Rodriguez, J. S.Lai, and F.Z.Peng, "Multilevel Inverters: A Survey of
topologies, Controls, and Applications," IEEE Trans. on Ind.
Electronics, Vol 49, No.4, August 2002, pp.724 - 738.
[5] H.Stemmler, P.Guggenbach," Configurations of High-Power Voltage
Source Inverter Drives", Proc. EPE Conf., 1993, pp.7 - 14.
[6] V.T.Somasekhar and K.Gopakumar, "Three-level inverter configuration
cascading two-level inverters", IEE Proc. of Electr. Power Appl.,
Vol.150, No.3, May 2003, pp.245-254.
[7] J.Holtz, "Pulsewidth modulation- A survey", IEEE Trans. on Industrial
Electronics, Vol. 30, No. 5, Dec 1992, pp. 410-420.
[8] Dae-Woong Chung, Joohn-Sheok Kim and Seung-Ki Sul, "Unified
Voltage Modulation Technique for Real-Time Three-Phase Power
Conversion", IEEE-Trans. on Ind.Appl, Vol.34, No.2, March/April
1998, pp.374-380.
[9] B.P.McGrath, D.G.Holmes and T.Meynard, "Reduced PWM Harmonic
Distortion for Multilevel Inverters Operating over a Wide Modulation
Range", IEEE Trans. on Power Electronics, vol. 21, no.4, July 2006, pp.
941-949.
[10] G.Carrara, S.Gardella, M.Marchesoni, R.Salutari, G.Sciutto, "A New
Multilevel PWM Method: A Theoretical Analysis," IEEE Trans. on
Power Electronics, vol. 7, no. 3, July 1992, pp. 497-505.
[11] L.M.Tolbert, and T.G.Habetler, "Novel Multilevel Inverter Carrier-
Based PWM Method", IEEE-Trans. on Ind.Appl, Vol.35, No.5,
Sept./Oct 1999, pp.1098-1107.
[12] L.Li.D.Czarkowski, Y.Liu and P.Pillay, "Multilevel space vector PWM
technique based on phase-shift harmonic suppression," in Proc. IEEE
Annu. APEC Conf., 2000, Vol.1, pp. 535-541.
[13] B.P.McGrath and D.G.Holmes, "Multicarrier PWM strategies for
multilevel inverters", IEEE Trans. on Power Electronics, vol. 49, no.4,
Aug 2002, pp. 858-867.
[14] P.C.Loh, D.G.Holmes, Y.Fukuta and T.A.Lipo, "Reduced Common-
Mode Modulation Strategies for Cascaded Multilevel Inverters", IEEETrans.
on Ind.Appl, Vol.39, No.5, Sept./Oct 2003, pp.1386-1395.
[15] R.Naderi and A.Rahmati, "Phase-Shifted Carrier PWM Technique for
General Cascaded Inverters", IEEE Trans. on Power Electronics, vol.23,
no. 3, May 2008, pp. 1257-1269.
@article{"International Journal of Electrical, Electronic and Communication Sciences:55786", author = "S.Srinivas", title = "Uniform Overlapped Multi-Carrier PWM for a Six-Level Diode Clamped Inverter", abstract = "Multi-level voltage source inverters offer several
advantages such as; derivation of a refined output voltage with
reduced total harmonic distortion (THD), reduction of voltage ratings
of the power semiconductor switching devices and also the reduced
electro-magnetic-interference problems etc. In this paper, new
carrier-overlapped phase-disposition or sub-harmonic sinusoidal
pulse width modulation (CO-PD-SPWM) and also the carrieroverlapped
phase-disposition space vector modulation (CO-PDSVPWM)
schemes for a six-level diode-clamped inverter topology
are proposed. The principle of the proposed PWM schemes is similar
to the conventional PD-PWM with a little deviation from it in the
sense that the triangular carriers are all overlapped. The overlapping
of the triangular carriers on one hand results in an increased number
of switchings, on the other hand this facilitates an improved spectral
performance of the output voltage. It is demonstrated through
simulation studies that the six-level diode-clamped inverter with the
use of CO-PD-SPWM and CO-PD-SVPWM proposed in this paper is
capable of generating multiple levels in its output voltage. The
advantages of the proposed PWM schemes can be derived to benefit,
especially at lower modulation indices of the inverter and hence this
aspect of the proposed PWM schemes can be well exploited in high
power applications requiring low speeds of operation of the drive.", keywords = "Diode clamped inverter, Pulse width modulation,Six level inverter, carrier based PWM.", volume = "3", number = "2", pages = "250-6", }