Investigation of Multiple Material Gate Impact on Short Channel Effects and Reliability of Nanoscale SOI MOSFETs
In this paper the features of multiple material gate
silicon-on-insulator MOSFETs are presented and compared with
single material gate silicon-on-insulator MOSFET structures. The
results indicate that the multiple material gate structures reduce short
channel effects such as drain induce barrier lowering, hot electron
effect and better current characteristics in comparison with single
material structures
[1] Z. Li, Yaolin. J. Lili. Z, "A single-halo dual-material gate SOI
MOSFET," IEEE. Shaanxi Province. IEDST, pp. 67-69, 2007.
[2] P. Razavi, A. A. Orouji, "Nanoscale Triple Material Double Gate (TMDG)
MOSFET for improving short channel effects," International
Conference on Advances in Electronics and Micro-electronics, pp. 11-
14, 2008.
[3] A. Chaudhry, M. Jagadesh Kumar, "Exploring the novel characteristics
of fully depleted Dual-Material Gate (DMG) SOI MOSFET using twodimensional
numerical simulation studies," IEEE International
Conference on VLSI Design (VLSID-04), 2004.
[4] W. Long, H. Ou, J. M. Kuo, K. K. Chin, "Dual Material Gate (DMG)
field effect transistor," IEEE Transactions Electron Devices, vol. 46, pp.
865-870, 1999.
[5] A. Chaudhry, M. Jagadash Kumar, "Two-Dimensional analytical
modeling of fully depleted DMG SOI MOSFET and evidence for
diminished SCEs," IEEE Transactions on Electron Devices, vol. 51, No.
4, pp. 569-574, Apr. 2004.
[6] P. Razavi, Ali. A. Orouji, "Dual Material Gate Oxide Stack Symmetric
Double Gate MOSFET: Improving short channel effects of nanoscale
double gate MOSFET," International Biennial Baltic Electronics
Conference (BEC), 2008.
[7] R. Rao, G. Katti, D. S. Havaldar, N. DasGupta, A. DasGupta, "Unified
analytical threshold voltage model for non-uniformly doped dual metal
gate fully depleted silicon-on-insulator MOSFETs," Solid-State
Electronics, vol. 53, pp. 256-265, Feb. 2009.
[8] A. Chaudhry, M. Jagadesh Kumar, "Investigation of the novel attributes
of a fully depleted dual-material gate SOI MOSFET," IEEE Trans.
Electron Device, vol. 51, no. 9, pp. 1463-1467, Sep. 2004.
[9] Ali A. Orouji, and M. Jagadesh Kumar, "Shielded channel double-gate
MOSFET: a novel device for reliable nanoscale CMOS applications,"
IEEE transactions on device and materials reliability, vol. 5, No. 3, pp.
509-514, Sep. 2005.
[10] K. Goel , M. Saxena , M. Gupta, R. S. Gupta, "Comparison of three
region multiple gate nanoscale structures for reduced short channel
effects and high device reliability," NSTI-Nanotech, vol. 3, pp. 816-819,
2006.
[11] G. Venkateshwar Reddy, M. Jagadesh Kumar, "Investigation of the
novel attributes of a single-halo double gate SOI MOSFET: 2D
simulation study," Microelectronics Journal, vol. 35, pp. 761-765, Jul.
2004.
[12] H. Liu, Q. Kuang, S. Luan, Y. Hao , "Performance analysis of dualmaterial
gate SOIMOSFET," IEEE, pp. 63-66, 2009.
[1] Z. Li, Yaolin. J. Lili. Z, "A single-halo dual-material gate SOI
MOSFET," IEEE. Shaanxi Province. IEDST, pp. 67-69, 2007.
[2] P. Razavi, A. A. Orouji, "Nanoscale Triple Material Double Gate (TMDG)
MOSFET for improving short channel effects," International
Conference on Advances in Electronics and Micro-electronics, pp. 11-
14, 2008.
[3] A. Chaudhry, M. Jagadesh Kumar, "Exploring the novel characteristics
of fully depleted Dual-Material Gate (DMG) SOI MOSFET using twodimensional
numerical simulation studies," IEEE International
Conference on VLSI Design (VLSID-04), 2004.
[4] W. Long, H. Ou, J. M. Kuo, K. K. Chin, "Dual Material Gate (DMG)
field effect transistor," IEEE Transactions Electron Devices, vol. 46, pp.
865-870, 1999.
[5] A. Chaudhry, M. Jagadash Kumar, "Two-Dimensional analytical
modeling of fully depleted DMG SOI MOSFET and evidence for
diminished SCEs," IEEE Transactions on Electron Devices, vol. 51, No.
4, pp. 569-574, Apr. 2004.
[6] P. Razavi, Ali. A. Orouji, "Dual Material Gate Oxide Stack Symmetric
Double Gate MOSFET: Improving short channel effects of nanoscale
double gate MOSFET," International Biennial Baltic Electronics
Conference (BEC), 2008.
[7] R. Rao, G. Katti, D. S. Havaldar, N. DasGupta, A. DasGupta, "Unified
analytical threshold voltage model for non-uniformly doped dual metal
gate fully depleted silicon-on-insulator MOSFETs," Solid-State
Electronics, vol. 53, pp. 256-265, Feb. 2009.
[8] A. Chaudhry, M. Jagadesh Kumar, "Investigation of the novel attributes
of a fully depleted dual-material gate SOI MOSFET," IEEE Trans.
Electron Device, vol. 51, no. 9, pp. 1463-1467, Sep. 2004.
[9] Ali A. Orouji, and M. Jagadesh Kumar, "Shielded channel double-gate
MOSFET: a novel device for reliable nanoscale CMOS applications,"
IEEE transactions on device and materials reliability, vol. 5, No. 3, pp.
509-514, Sep. 2005.
[10] K. Goel , M. Saxena , M. Gupta, R. S. Gupta, "Comparison of three
region multiple gate nanoscale structures for reduced short channel
effects and high device reliability," NSTI-Nanotech, vol. 3, pp. 816-819,
2006.
[11] G. Venkateshwar Reddy, M. Jagadesh Kumar, "Investigation of the
novel attributes of a single-halo double gate SOI MOSFET: 2D
simulation study," Microelectronics Journal, vol. 35, pp. 761-765, Jul.
2004.
[12] H. Liu, Q. Kuang, S. Luan, Y. Hao , "Performance analysis of dualmaterial
gate SOIMOSFET," IEEE, pp. 63-66, 2009.
@article{"International Journal of Electrical, Electronic and Communication Sciences:60841", author = "Paniz Tafakori and Ali A. Orouji", title = "Investigation of Multiple Material Gate Impact on Short Channel Effects and Reliability of Nanoscale SOI MOSFETs", abstract = "In this paper the features of multiple material gate
silicon-on-insulator MOSFETs are presented and compared with
single material gate silicon-on-insulator MOSFET structures. The
results indicate that the multiple material gate structures reduce short
channel effects such as drain induce barrier lowering, hot electron
effect and better current characteristics in comparison with single
material structures", keywords = "Short-channel effects (SCEs), Dual material gate
(DMG), Triple material gate (TMG), Pentamerous material gate
(PMG).", volume = "7", number = "2", pages = "145-4", }