Design of a Neural Networks Classifier for Face Detection

Face detection and recognition has many applications in a variety of fields such as security system, videoconferencing and identification. Face classification is currently implemented in software. A hardware implementation allows real-time processing, but has higher cost and time to-market. The objective of this work is to implement a classifier based on neural networks MLP (Multi-layer Perceptron) for face detection. The MLP is used to classify face and non-face patterns. The systm is described using C language on a P4 (2.4 Ghz) to extract weight values. Then a Hardware implementation is achieved using VHDL based Methodology. We target Xilinx FPGA as the implementation support.

Authors:

• F. Smach
• M. Atri
• J. Mitéran
• M. Abid

Keywords:

• Classification
• Face Detection
• FPGA Hardware description
• MLP.

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