Abstract: The general purpose processors that are used in
embedded systems must support constraints like execution time,
power consumption, code size and so on. On the other hand an
Application Specific Instruction-set Processor (ASIP) has advantages
in terms of power consumption, performance and flexibility. In this
paper, a 16-bit Application Specific Instruction-set processor for the
sensor data transfer is proposed. The designed processor architecture
consists of on-chip transmitter and receiver modules along with the
processing and controlling units to enable the data transmission and
reception on a single die. The data transfer is accomplished with less
number of instructions as compared with the general purpose
processor. The ASIP core operates at a maximum clock frequency of
1.132GHz with a delay of 0.883ns and consumes 569.63mW power
at an operating voltage of 1.2V. The ASIP is implemented in Verilog
HDL using the Xilinx platform on Virtex4.
Abstract: This paper presents a synthetic jet air blower actuated
by PZT for air blowing for air-breathing micro PEM fuel cell. The
several factors to affect the performance of air-breathing PEM fuel cell
such as air flow rate, opening ratio and cathode open type in the
cathode side were studied. Especially, an air flow rate is critical
condition to improve its performance. In this paper, we developed a
synthetic jet air blower to supply a high stoichiometric air flow. The
synthetic jet mechanism is a zero mass flux device that converts
electrical energy into the momentum. The synthetic jet actuation is
usually generated by a traditional PZT actuator, which consists of a
small cylindrical cavity, in/outlet channel and PZT diaphragms. The
flow rate of the fabricated synthetic jet air blower was 400cc/min at
550Hz and its power consumption was very low under 0.3W. The
proposed air-breathing PEM fuel cell which installed synthetic jet air
blower was higher performance and stability during continuous
operation than the air-breathing fuel cell without auxiliary device to
supply the air. The results showed that the maximum power density
was 188mW/cm2 at 400mA/cm2. This maximum power density and
durability were improved more than 40% and 20%, respectively.
Abstract: Low power consumption is a major constraint for battery-powered system like computer notebook or PDA. In the past, specialists usually designed both specific optimized equipments and codes to relief this concern. Doing like this could work for quite a long time, however, in this era, there is another significant restraint, the time to market. To be able to serve along the power constraint while can launch products in shorter production period, objectoriented programming (OOP) has stepped in to this field. Though everyone knows that OOP has quite much more overhead than assembly and procedural languages, development trend still heads to this new world, which contradicts with the target of low power consumption. Most of the prior power related software researches reported that OOP consumed much resource, however, as industry had to accept it due to business reasons, up to now, no papers yet had mentioned about how to choose the best OOP practice in this power limited boundary. This article is the pioneer that tries to specify and propose the optimized strategy in writing OOP software under energy concerned environment, based on quantitative real results. The language chosen for studying is C# based on .NET Framework 2.0 which is one of the trendy OOP development environments. The recommendation gotten from this research would be a good roadmap that can help developers in coding that well balances between time to market and time of battery.
Abstract: In this paper we present a full performance analysis of an energy conserving routing protocol in mobile ad hoc network, named ER-AODV (Energy Reverse Ad-hoc On-demand Distance Vector routing). ER-AODV is a reactive routing protocol based on a policy which combines two mechanisms used in the basic AODV protocol. AODV and most of the on demand ad hoc routing protocols use single route reply along reverse path. Rapid change of topology causes that the route reply could not arrive to the source node, i.e. after a source node sends several route request messages, the node obtains a reply message, and this increases in power consumption. To avoid these problems, we propose a mechanism which tries multiple route replies. The second mechanism proposes a new adaptive approach which seeks to incorporate the metric "residual energy " in the process route selection, Indeed the residual energy of mobile nodes were considered when making routing decisions. The results of simulation show that protocol ER-AODV answers a better energy conservation.
Abstract: In this paper, zigbee communication based wireless energy surveillance system is presented. The proposed system consists of multiple energy surveillance devices and an energy surveillance monitor. Each different standby power-off value of electric device is set automatically by using learning function of energy surveillance device. Thus adaptive standby power-off function provides user convenience and it maximizes the energy savings. Also, power consumption monitoring function is helpful to reduce inefficient energy consumption in home. The zigbee throughput simulator is designed to evaluate minimum transmission power and maximum allowable information quantity in the proposed system. The test result of prototype has been satisfied all the requirements. The proposed system has confirmed that can be used as an intelligent energy surveillance system for energy savings in home or office.
Abstract: Active vibration isolation systems are less commonly
used than passive systems due to their associated cost and power
requirements. In principle, semi-active isolation systems can deliver
the versatility, adaptability and higher performance of fully active
systems for a fraction of the power consumption. Various semi-active
control algorithms have been suggested in the past. This paper
studies the 4DOF model of semi-active suspension performance
controlled by on–off and continuous skyhook damping control
strategy. The frequency and transient responses of model are
evaluated in terms of body acceleration, roll angle and tire deflection
and are compared with that of a passive damper. The results show
that the semi-active system controlled by skyhook strategy always
provides better isolation than a conventional passively damped
system except at tire natural frequencies.
Abstract: This work aims to reduce the read power consumption
as well as to enhance the stability of the SRAM cell during the read
operation. A new 10-transisor cell is proposed with a new read
scheme to minimize the power consumption within the memory core.
It has separate read and write ports, thus cell read stability is
significantly improved. A 16Kb SRAM macro operating at 1V
supply voltage is demonstrated in 65 nm CMOS process. Its read
power consumption is reduced to 24% of the conventional design.
The new cell also has lower leakage current due to its special bit-line
pre-charge scheme. As a result, it is suitable for low-power mobile
applications where power supply is restricted by the battery.
Abstract: The use of Quantum dots is a promising emerging
Technology for implementing digital system at the nano level. It is
effecient for attractive features such as faster speed , smaller size and
low power consumption than transistor technology. In this paper,
various Combinational and sequential logical structures - HALF
ADDER, SR Latch and Flip-Flop, D Flip-Flop preceding NAND,
NOR, XOR,XNOR are discussed based on QCA design, with
comparatively less number of cells and area. By applying these
layouts, the hardware requirements for a QCA design can be reduced.
These structures are designed and simulated using QCA Designer
Tool. By taking full advantage of the unique features of this
technology, we are able to create complete circuits on a single layer
of QCA. Such Devices are expected to function with ultra low
power Consumption and very high speeds.
Abstract: Design Patterns have gained more and more
acceptances since their emerging in software development world last
decade and become another de facto standard of essential knowledge
for Object-Oriented Programming developers nowadays.
Their target usage, from the beginning, was for regular computers,
so, minimizing power consumption had never been a concern.
However, in this decade, demands of more complicated software for
running on mobile devices has grown rapidly as the much higher
performance portable gadgets have been supplied to the market
continuously. To get along with time to market that is business
reason, the section of software development for power conscious,
battery, devices has shifted itself from using specific low-level
languages to higher level ones. Currently, complicated software
running on mobile devices are often developed by high level
languages those support OOP concepts. These cause the trend of
embracing Design Patterns to mobile world.
However, using Design Patterns directly in software development
for power conscious systems is not recommended because they were
not originally designed for such environment. This paper
demonstrates the adapted Design Pattern for power limitation system.
Because there are numerous original design patterns, it is not possible
to mention the whole at once. So, this paper focuses only in creating
Energy Conscious version of existing regular "Builder Pattern" to be
appropriated for developing low power consumption software.
Abstract: Wireless Sensor Networks can be used to monitor the
physical phenomenon in such areas where human approach is nearly
impossible. Hence the limited power supply is the major constraint of
the WSNs due to the use of non-rechargeable batteries in sensor
nodes. A lot of researches are going on to reduce the energy
consumption of sensor nodes. Energy map can be used with
clustering, data dissemination and routing techniques to reduce the
power consumption of WSNs. Energy map can also be used to know
which part of the network is going to fail in near future. In this paper,
Energy map is constructed using the prediction based approach.
Adaptive alpha GM(1,1) model is used as the prediction model.
GM(1,1) is being used worldwide in many applications for predicting
future values of time series using some past values due to its high
computational efficiency and accuracy.
Abstract: The use of neural networks is popular in various
building applications such as prediction of heating load, ventilation
rate and indoor temperature. Significant is, that only few papers deal
with indoor carbon dioxide (CO2) prediction which is a very good
indicator of indoor air quality (IAQ). In this study, a data-driven
modelling method based on multilayer perceptron network for indoor
air carbon dioxide in an apartment building is developed.
Temperature and humidity measurements are used as input variables
to the network. Motivation for this study derives from the following
issues. First, measuring carbon dioxide is expensive and sensors
power consumptions is high and secondly, this leads to short
operating times of battery-powered sensors. The results show that
predicting CO2 concentration based on relative humidity and
temperature measurements, is difficult. Therefore, more additional
information is needed.
Abstract: As embedded and portable systems were emerged power consumption of circuits had been major challenge. On the other hand latency as determines frequency of circuits is also vital task. Therefore, trade off between both of them will be desirable. Modulo 2n+1 adders are important part of the residue number system (RNS) based arithmetic units with the interesting moduli set (2n-1,2n, 2n+1). In this manuscript we have introduced novel binary representation to the design of modulo 2n+1 adder. VLSI realization of proposed architecture under 180 nm full static CMOS technology reveals its superiority in terms of area, power consumption and power-delay product (PDP) against several peer existing structures.
Abstract: This paper presents two prototypes of low power low voltage current mode 9 bit pipelined a/d converters. The first and the second converters are configured of 1.5 bit and 2.5 bit stages, respectively. The a/d converter structures are composed of current mode building blocks and final comparator block which converts the analog current signal into digital voltage signal. All building blocks have been designed in CMOS AMS 0.35μm technology, then simulated to verify proposed concept. The performances of both converters are compared to performances of known current mode and voltage mode switched capacitance converter structures. Low power consumption and small chip area are advantages of the proposed converters.
Abstract: Although White LED lighting systems powered by solar cells have presented for many years, they are not widely used in today application because of their cost and low energy conversion efficiency. The proposed system use the dc power generated by fixed solar cells module to energize White LED light sources that are operated by directly connected White LED with current limitation resistors, resulting in much more power consumption. This paper presents the use of white LED as a general lighting application powered by tracking solar cells module and using pulse to apply the electrical power to the White LED. These systems resulted in high efficiency power conversion, low power consumption, and long light of the white LED.
Abstract: This paper presents the design of a low power second-order continuous-time sigma-delta modulator for low power
applications. The loop filter of this modulator has been implemented based on the nonlinear transconductance-capacitor (Gm-C) by employing current-mode technique. The nonlinear transconductance uses floating gate MOS (FG-MOS) transistors that operate in weak inversion region. The proposed modulator features low power consumption (
Abstract: Full adders are important components in applications
such as digital signal processors (DSP) architectures and
microprocessors. In addition to its main task, which is adding two
numbers, it participates in many other useful operations such as
subtraction, multiplication, division,, address calculation,..etc. In
most of these systems the adder lies in the critical path that
determines the overall speed of the system. So enhancing the
performance of the 1-bit full adder cell (the building block of the
adder) is a significant goal.Demands for the low power VLSI have
been pushing the development of aggressive design methodologies to
reduce the power consumption drastically. To meet the growing
demand, we propose a new low power adder cell by sacrificing the
MOS Transistor count that reduces the serious threshold loss
problem, considerably increases the speed and decreases the power
when compared to the static energy recovery full (SERF) adder. So a
new improved 14T CMOS l-bit full adder cell is presented in this
paper. Results show 50% improvement in threshold loss problem,
45% improvement in speed and considerable power consumption
over the SERF adder and other different types of adders with
comparable performance.
Abstract: Multiplication algorithms have considerable effect on
processors performance. A new high-speed, low-power
multiplication algorithm has been presented using modified Dadda
tree structure. Three important modifications have been implemented
in inner product generation step, inner product reduction step and
final addition step. Optimized algorithms have to be used into basic
computation components, such as multiplication algorithms. In this
paper, we proposed a new algorithm to reduce power, delay, and
transistor count of a multiplication algorithm implemented using low
power modified counter. This work presents a novel design for
Dadda multiplication algorithms. The proposed multiplication
algorithm includes structured parts, which have important effect on
inner product reduction tree. In this paper, a 1.3V, 64-bit carry hybrid
adder is presented for fast, low voltage applications. The new 64-bit
adder uses a new circuit to implement the proposed carry hybrid
adder. The new adder using 80 nm CMOS technology has been
implemented on 700 MHz clock frequency. The proposed
multiplication algorithm has achieved 14 percent improvement in
transistor count, 13 percent reduction in delay and 12 percent
modification in power consumption in compared with conventional
designs.
Abstract: Greenhouse gases (GHG) emissions impose major
threat to global warming potential (GWP). Unfortunately
manufacturing sector is one of the major sources that contribute
towards the rapid increase in greenhouse gases (GHG) emissions. In
manufacturing sector electric power consumption is the major driver
that influences CO2 emission. Titanium alloys are widely utilized in
aerospace, automotive and petrochemical sectors because of their
high strength to weight ratio and corrosion resistance. Titanium
alloys are termed as difficult to cut materials because of their poor
machinability rating. The present study analyzes energy consumption
during cutting with reference to material removal rate (MRR).
Surface roughness was also measured in order to optimize energy
consumption.
Abstract: Multicarrier transmission system such as Orthogonal
Frequency Division Multiplexing (OFDM) is a promising technique
for high bit rate transmission in wireless communication system.
OFDM is a spectrally efficient modulation technique that can achieve
high speed data transmission over multipath fading channels without
the need for powerful equalization techniques. However the price
paid for this high spectral efficiency and less intensive equalization
is low power efficiency. OFDM signals are very sensitive to nonlinear
effects due to the high Peak-to-Average Power Ratio (PAPR),
which leads to the power inefficiency in the RF section of the
transmitter. This paper investigates the effect of PAPR reduction on
the performance parameter of multicarrier communication system.
Performance parameters considered are power consumption of Power
Amplifier (PA) and Digital-to-Analog Converter (DAC), power amplifier
efficiency, SNR of DAC and BER performance of the system.
From our analysis it is found that irrespective of PAPR reduction
technique being employed, the power consumption of PA and DAC
reduces and power amplifier efficiency increases due to reduction in
PAPR. Moreover, it has been shown that for a given BER performance
the requirement of Input-Backoff (IBO) reduces with reduction in
PAPR.
Abstract: Nowadays, new home appliances and office appliances
have been developed that communicate with users through the
Internet, for remote monitor and remote control. However, developments
and sales of these new appliances are just started, then,
many products in our houses and offices do not have these useful
functions. In few years, we add these new functions to the outlet,
it means multifunctional electrical power socket plug adapter. The
outlet measure power consumption of connecting appliances, and it
can switch power supply to connecting appliances, too. Using this
outlet, power supply of old appliances can be control and monitor.
And we developed the interface system using web browser to operate
it from users[1]. But, this system need to set up LAN cables between
outlets and so on. It is not convenience that cables around rooms. In
this paper, we develop the system that use wireless mobile ad hoc
network instead of wired LAN to communicate with the outlets.