Dimensionality Reduction in Modal Analysis for Structural Health Monitoring

Autonomous structural health monitoring (SHM) of many structures and bridges became a topic of paramount importance for maintenance purposes and safety reasons. This paper proposes a set of machine learning (ML) tools to perform automatic feature selection and detection of anomalies in a bridge from vibrational data and compare different feature extraction schemes to increase the accuracy and reduce the amount of data collected. As a case study, the Z-24 bridge is considered because of the extensive database of accelerometric data in both standard and damaged conditions. The proposed framework starts from the first four fundamental frequencies extracted through operational modal analysis (OMA) and clustering, followed by time-domain filtering (tracking). The fundamental frequencies extracted are then fed to a dimensionality reduction block implemented through two different approaches: feature selection (intelligent multiplexer) that tries to estimate the most reliable frequencies based on the evaluation of some statistical features (i.e., entropy, variance, kurtosis), and feature extraction (auto-associative neural network (ANN)) that combine the fundamental frequencies to extract new damage sensitive features in a low dimensional feature space. Finally, one-class classification (OCC) algorithms perform anomaly detection, trained with standard condition points, and tested with normal and anomaly ones. In particular, principal component analysis (PCA), kernel principal component analysis (KPCA), and autoassociative neural network (ANN) are presented and their performance are compared. It is also shown that, by evaluating the correct features, the anomaly can be detected with accuracy and an F1 score greater than 95%.

Evolving Digital Circuits for Early Stage Breast Cancer Detection Using Cartesian Genetic Programming

Cartesian Genetic Programming (CGP) is explored to design an optimal circuit capable of early stage breast cancer detection. CGP is used to evolve simple multiplexer circuits for detection of malignancy in the Fine Needle Aspiration (FNA) samples of breast. The data set used is extracted from Wisconsins Breast Cancer Database (WBCD). A range of experiments were performed, each with different set of network parameters. The best evolved network detected malignancy with an accuracy of 99.14%, which is higher than that produced with most of the contemporary non-linear techniques that are computational expensive than the proposed system. The evolved network comprises of simple multiplexers and can be implemented easily in hardware without any further complications or inaccuracy, being the digital circuit.

A Unified Approach for Naval Telecommunication Architectures

We present a chronological evolution for naval telecommunication networks. We distinguish periods: with or without multiplexers, with switch systems, with federative systems, with medium switching, and with medium switching with wireless networks. This highlights the introduction of new layers and technology in the architecture. These architectures are presented using layer models of transmission, in a unified way, which enables us to integrate pre-existing models. A ship of a naval fleet has internal communications (i.e. applications' networks of the edge) and external communications (i.e. the use of the means of transmission between edges). We propose architectures, deduced from the layer model, which are the point of convergence between the networks on board and the HF, UHF radio, and satellite resources. This modelling allows to consider end-to-end naval communications, and in a more global way, that is from the user on board towards the user on shore, including transmission and networks on the shore side. The new architectures need take care of quality of services for end-to-end communications, the more remote control develops a lot and will do so in the future. Naval telecommunications will be more and more complex and will use more and more advanced technologies, it will thus be necessary to establish clear global communication schemes to grant consistency of the architectures. Our latest model has been implemented in a military naval situation, and serves as the basic architecture for the RIFAN2 network.

Multiple-Channel Piezoelectric Actuated Tunable Optical Filter for WDM Application

We propose new multiple-channel piezoelectric (PZT) actuated tunable optical filter based on racetrack multi-ring resonators for wavelength de-multiplexing network applications. We design tunable eight-channel wavelength de-multiplexer consisting of eight cascaded PZT actuated tunable multi-ring resonator filter with a channel spacing of 1.6nm. The filter for each channel is basically structured on a suspended beam, sandwiched with piezoelectric material and built in integrated ring resonators which are placed on the middle of the beam to gain uniform stress and linearly varying longitudinal strain. A reference single mode serially coupled multi stage racetrack ring resonator with the same radii and coupling length is designed with a line width of 0.8974nm with a flat top pass band at 1dB of 0.5205nm and free spectral range of about 14.9nm. In each channel, a small change in the perimeter of the rings is introduced to establish the shift in resonance wavelength as per the defined channel spacing. As a result, when a DC voltage is applied, the beams will elongate, which involves mechanical deformation of the ring resonators that induces a stress and a strain, which brings a change in refractive index and perimeter of the rings leading to change in the output spectrum shift providing the tunability of central wavelength in each channel. Simultaneous wave length shift as high as 45.54pm/

Design and Testing of Nanotechnology Based Sequential Circuits Using MX-CQCA Logic in VHDL

This paper impart the design and testing of Nanotechnology based sequential circuits using multiplexer conservative QCA (MX-CQCA) logic gates, which is easily testable using only two vectors. This method has great prospective in the design of sequential circuits based on reversible conservative logic gates and also smashes the sequential circuits implemented in traditional gates in terms of testability. Reversible circuits are similar to usual logic circuits except that they are built from reversible gates. Designs of multiplexer conservative QCA logic based two vectors testable double edge triggered (DET) sequential circuits in VHDL language are also accessible here; it will also diminish intricacy in testing side. Also other types of sequential circuits such as D, SR, JK latches are designed using this MX-CQCA logic gate. The objective behind the proposed design methodologies is to amalgamate arithmetic and logic functional units optimizing key metrics such as garbage outputs, delay, area and power. The projected MX-CQCA gate outshines other reversible gates in terms of the intricacy, delay.

A New Efficient RNS Reverse Converter for the 4-Moduli Set 

In this paper, we propose a new efficient reverse converter for the 4-moduli set {2n, 2n + 1, 2n − 1, 22n+1 – 1} based on a modified Chinese Remainder Theorem and Mixed Radix Conversion. Additionally, the resulting architecture is further reduced to obtain a reverse converter that utilizes only carry save adders, a multiplexer and carry propagate adders. The proposed converter has an area cost of (12n + 2) FAs and (5n + 1) HAs with a delay of (9n + 6)tFA + tMUX. When compared with state of the art, our proposal demonstrates to be faster, at the expense of slightly more hardware resources. Further, the Area-Time square metric was computed which indicated that our proposed scheme outperforms the state of the art reverse converter.

High Speed Video Transmission for Telemedicine using ATM Technology

In this paper, we study statistical multiplexing of VBR video in ATM networks. ATM promises to provide high speed realtime multi-point to central video transmission for telemedicine applications in rural hospitals and in emergency medical services. Video coders are known to produce variable bit rate (VBR) signals and the effects of aggregating these VBR signals need to be determined in order to design a telemedicine network infrastructure capable of carrying these signals. We first model the VBR video signal and simulate it using a generic continuous-data autoregressive (AR) scheme. We carry out the queueing analysis by the Fluid Approximation Model (FAM) and the Markov Modulated Poisson Process (MMPP). The study has shown a trade off: multiplexing VBR signals reduces burstiness and improves resource utilization, however, the buffer size needs to be increased with an associated economic cost. We also show that the MMPP model and the Fluid Approximation model fit best, respectively, the cell region and the burst region. Therefore, a hybrid MMPP and FAM completely characterizes the overall performance of the ATM statistical multiplexer. The ramifications of this technology are clear: speed, reliability (lower loss rate and jitter), and increased capacity in video transmission for telemedicine. With migration to full IP-based networks still a long way to achieving both high speed and high quality of service, the proposed ATM architecture will remain of significant use for telemedicine.

Optimized Multiplier Based upon 6-Input Luts and Vedic Mathematics

A new approach has been used for optimized design of multipliers based upon the concepts of Vedic mathematics. The design has been targeted to state-of-the art field-programmable gate arrays (FPGAs). The multiplier generates partial products using Vedic mathematics method by employing basic 4x4 multipliers designed by exploiting 6-input LUTs and multiplexers in the same slices resulting in drastic reduction in area. The multiplier is realized on Xilinx FPGAs using devices Virtex-5 and Virtex-6.Carry Chain Adder was employed to obtain final products. The performance of the proposed multiplier was examined and compared to well-known multipliers such as Booth, Carry Save, Carry ripple, and array multipliers. It is demonstrated that the proposed multiplier is superior in terms of speed as well as power consumption.

Design and Simulation Interface Circuit for Piezoresistive Accelerometers with Offset Cancellation Ability

This paper presents a new method for read out of the piezoresistive accelerometer sensors. The circuit works based on Instrumentation amplifier and it is useful for reducing offset In Wheatstone Bridge. The obtained gain is 645 with 1μv/°c Equivalent drift and 1.58mw power consumption. A Schmitt trigger and multiplexer circuit control output node. a high speed counter is designed in this work .the proposed circuit is designed and simulated In 0.18μm CMOS technology with 1.8v power supply.

Design of Low-Area HEVC Core Transform Architecture

This paper proposes and implements an core transform architecture, which is one of the major processes in HEVC video compression standard. The proposed core transform architecture is implemented with only adders and shifters instead of area-consuming multipliers. Shifters in the proposed core transform architecture are implemented in wires and multiplexers, which significantly reduces chip area. Also, it can process from 4×4 to 16×16 blocks with common hardware by reusing processing elements. Designed core transform architecture in 0.13um technology can process a 16×16 block with 2-D transform in 130 cycles, and its gate count is 101,015 gates.

Design of Ultra Fast Polymer Electro-Optic waveguide Switch for Intelligent Optical Networks

Traditional optical networks are gradually evolving towards intelligent optical networks due to the need for faster bandwidth provisioning, protection and restoration of the network that can be accomplished with devices like optical switch, add drop multiplexer and cross connects. Since dense wavelength multiplexing forms the physical layer for intelligent optical networking, the roll of high speed all optical switch is important. This paper analyzes such an ultra-high speed polymer electro-optic switch. The performances of the 2x2 optical waveguide switch with rectangular, triangular and trapezoidal grating profiles on various device parameters are analyzed. The simulation result shows that trapezoidal grating is the optimized structure which has the coupling length of 81μm and switching voltage of 11V for the operating wavelength of 1550nm. The switching time for this proposed switch is 0.47 picosecond. This makes the proposed switch to be an important element in the intelligent optical network.

Low Leakage MUX/XOR Functions Using Symmetric and Asymmetric FinFETs

In this paper, FinFET devices are analyzed with emphasis on sub-threshold leakage current control. This is achieved through proper biasing of the back gate, and through the use of asymmetric work functions for the four terminal FinFET devices. We are also examining different configurations of multiplexers and XOR gates using transistors of symmetric and asymmetric work functions. Based on extensive characterization data for MUX circuits, our proposed configuration using symmetric devices lead to leakage current and delay improvements of 65% and 47% respectively compared to results in the literature. For XOR gates, a 90% improvement in the average leakage current is achieved by using asymmetric devices. All simulations are based on a 25nm FinFET technology using the University of Florida UFDG model.

Improved Plasmonic Demultiplexer Based on Tapered and Rectangular Slot MIM Waveguide

In this paper, we have proposed two novel plasmonic demultiplexing structures based on metal-insulator-metal surfaces which, beside their compact size, have a very good transmission spectrum. The impact of the key internal parameters on the transmission spectrum is numerically analyzed by using the twodimensional (2D) finite difference time domain (FDTD) method. The proposed structures could be used to develop ultra-compact photonic wavelength demultiplexing devices for large-scale photonic integration.

Interconnect Analysis of a Novel Multiplexer Based Full-Adder Cell for Power and Propagation Delay Optimizations

The proposed multiplexer-based novel 1-bit full adder cell is schematized by using DSCH2 and its layout is generated by using microwind VLSI CAD tool. The adder cell layout interconnect analysis is performed by using BSIM4 layout analyzer. The adder circuit is compared with other six existing adder circuits for parametric analysis. The proposed adder cell gives better performance than the other existing six adder circuits in terms of power, propagation delay and PDP. The proposed adder circuit is further analyzed for interconnect analysis, which gives better performance than other adder circuits in terms of layout thickness, width and height.

Routing Capability and Blocking Analysis of Dynamic ROADM Optical Networks (Category - II) for Dynamic Traffic

Reconfigurable optical add/drop multiplexers (ROADMs) can be classified into three categories based on their underlying switching technologies. Category I consists of a single large optical switch; category II is composed of a number of small optical switches aligned in parallel; and category III has a single optical switch and only one wavelength being added/dropped. In this paper, to evaluate the wavelength-routing capability of ROADMs of category-II in dynamic optical networks,the dynamic traffic models are designed based on Bernoulli, Poisson distributions for smooth and regular types of traffic. Through Analytical and Simulation results, the routing power of cat-II of ROADM networks for two traffic models are determined.

Optimal Channel Equalization for MIMO Time-Varying Channels

We consider optimal channel equalization for MIMO (multi-input/multi-output) time-varying channels in the sense of MMSE (minimum mean-squared-error), where the observation noise can be non-stationary. We show that all ZF (zero-forcing) receivers can be parameterized in an affine form which eliminates completely the ISI (inter-symbol-interference), and optimal channel equalizers can be designed through minimization of the MSE (mean-squarederror) between the detected signals and the transmitted signals, among all ZF receivers. We demonstrate that the optimal channel equalizer is a modified Kalman filter, and show that under the AWGN (additive white Gaussian noise) assumption, the proposed optimal channel equalizer minimizes the BER (bit error rate) among all possible ZF receivers. Our results are applicable to optimal channel equalization for DWMT (discrete wavelet multitone), multirate transmultiplexers, OFDM (orthogonal frequency division multiplexing), and DS (direct sequence) CDMA (code division multiple access) wireless data communication systems. A design algorithm for optimal channel equalization is developed, and several simulation examples are worked out to illustrate the proposed design algorithm.

Silicon-based Low-Power Reconfigurable Optical Add-Drop Multiplexer (ROADM)

We demonstrate a 1×4 coarse wavelength division-multiplexing (CWDM) planar concave grating multiplexer/demultiplexer and its application in re-configurable optical add/drop multiplexer (ROADM) system in silicon-on-insulator substrate. The wavelengths of the demonstrated concave grating multiplexer align well with the ITU-T standard. We demonstrate a prototype of ROADM comprising two such concave gratings and four wide-band thermo-optical MZI switches. Undercut technology which removes the underneath silicon substrate is adopted in optical switches in order to minimize the operation power. For all the thermal heaters, the operation voltage is smaller than 1.5 V, and the switch power is ~2.4 mW. High throughput pseudorandom binary sequence (PRBS) data transmission with up to 100 Gb/s is demonstrated, showing the high-performance ROADM functionality.